DATE 2019

Technical Program

Tuesday, 26 March 2019
1.1 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7
3.8 IP1 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8
Wednesday, 27 March 2019
5.1 5.2 5.3 5.4 5.5 5.6 5.7 5.8 IP2 6.1 6.2 6.3 6.4 6.5 6.6 6.7 6.8 7.0 7.1
7.2 7.3 7.4 7.5 7.6 7.7 7.8 IP3 8.1 8.2 8.3 8.4 8.5 8.6 8.7 8.8
Thursday, 28 March 2019
9.1 9.2 9.3 9.4 9.5 9.6 9.7 9.8 IP4 10.1 10.2 10.3 10.4 10.5 10.6 10.7
10.8 11.0 11.1 11.2 11.3 11.4 11.5 11.6 11.7 11.8 IP5 12.1 12.2 12.3 12.4 12.5
12.6 12.7 12.8
Session Opening Session: Plenary, Awards Ceremony & Keynote Addresses
Session Code / Room1.1 / Palazzo dei Congressi
Date / TimeTuesday, March 26, 2019 / 08:30 – 10:30
ChairJürgen Teich, DATE 2019 General Chair, Friedrich-Alexander-Universität Erlangen-Nürnberg, DE
Co-ChairFranco Fummi, DATE 2019 Programme Chair, Universita' di Verona, IT

08:30 – 08:45

Jürgen Teich and Franco Fummi

08:45 – 09:15

Presentation of Awards

09:15 – 10:30

Keynote Address 1: Working with Safe, Deterministic and Secure Intelligence from Cloud to Edge
Kenneth P. Caviasca

09:15 – 10:30

Keynote Address 2: Assisted and Automated Driving
Jürgen Bortolazzi

Session TitleExecutive Session 1: Panel "Life After CMOS"
Session Code / Room2. 1 / Room 1
Date / TimeTuesday, March 26, 2019 / 11:30 – 13:00
ChairG. Dan Hutcheson, VLSI Research, US

11:30 – 13:00

Executive Panel: Life After CMOS

Session TitlePhysical Attacks
Session Code / Room2.2 / Room 2
Date / TimeTuesday, March 26, 2019 / 11:30 – 13:00
ChairLejla Batina, Radboud University, NL
Co-ChairElif Kavun, University of Sheffield, UK

11:30 -12:00

One Fault is All it Needs: Breaking Higher-Order Masking with Persistent Fault Analysis
Jingyu Pan, Shivam Bhasin, Fan Zhang and Kui Ren

12:00 -12:30

Multi-Tenant FPGA-based Reconfigurable Systems: Attacks and Defenses
Rana Elnaggar, Ramesh Karri and Krishnendu Chakrabarty

12:30 -12:45

Spying on Temperature using DRAM
Wenjie Xiong, Nikolaos Athanasios Anagnostopoulos, André Schaller, Stefan Katzenbeisser and Jakub Szefer

12:45 -13:00

Mitigating Power Supply Glitch based Fault Attacks with Fast All-Digital Clock Modulation Circuit
Arvind Singh, Monodeep Kar, Nikhil Chawla and Saibal Mukhopadhyay

Session TitleSpecial Session: Circuit design and design automation for flexible electronics
Session Code / Room2.3 / Room 3
Date / TimeTuesday, March 26, 2019 / 11:30 – 13:00
ChairJamil Kawa, Synopsys, US

11:30 -11:52

Dual-gate self-aligned a-InGaZnO transistor model for flexible circuit applications
Florian De Roose, Hikmet Çeliker, Jan Genoe, Wim Dehaene and Kris Myny

11:52 -12:14

Predictive Modeling and Design Automation of Inorganic Printed Electronics
Farhan Rasheed, Michael Hefenbrock, Rajendra Bishnoi, Michael Beigl, Jasmin Aghassi-Hagmann and Mehdi B. Tahoori

12:14 -12:36

Process Design Kit and Design Automation for Flexible Hybrid Electronics
Tsung-Ching Jim Huang, Ting Lei, Leilai Shao, Sridhar Sivapurapu, Madhavan Swaminathan, Sicheng Li, Zhenan Bao, Kwang-Ting Cheng and Raymond Beausoleil

12:36 -13:00

Circuit Design and Design Automation for Printed Electronics
M. Fattori, J.A. Fijn, L. Hu, Eugenio Cantatore, Fabrizion Torricelli and Micael Charbonneau

Session TitleTemperature and Variability Driven Modeling and Runtime Management
Session Code / Room2.4 / Room 4
Date / TimeTuesday, March 26, 2019 / 11:30 – 13:00
ChairMarco Domenico Santambrogio, Polytechnic University of Milan, IT
Co-chairRonald Ronald Dreslinski Jr, University of Michigan, US

11:30 -12:00

Hot Spot Identification and System Parameterized Thermal Modeling for Multi-Core Processors Through Infrared Thermal Imaging
Sheriff Sadiqbatcha, Hengyang Zhao, Hussam Amrouch, Jörg Henkel and Sheldon X.-D. Tan

12:00 -12:30

Litho-GPA: Gaussian Process Assurance for Lithography Hotspot Detection
Wei Ye, Mohamed Baker Alawieh, Meng Li, Yibo Lin and David Z. Pan

12:30 -12:45

PinT: Polynomial in Temperature Decode Weights in a Neuromorphic Architecture
Scott Reid, Antonio Montoya and Kwabena Boahen

12:45 -13:00

Enhancing Two-Phase Cooling Efficiency through Thermal-Aware Workload Mapping for Power-Hungry Servers
Arman Iranfar, Ali Pahlevan, Marina Zapater and David Atienza

Session TitleSolutions for reliability and security of mixed-signal circuits
Session Code / Room2.5 / Room 5
Date / TimeTuesday, March 26, 2019 / 11:30 – 13:00
ChairGeorges Gielen, KU Leuven, BE
Co-ChairManuel Barragan, TIMA, FR

11:30 -12:00

IR-aware Power Net Routing for Multi-Voltage Mixed-Signal Design
Shuo-Hui Wang, Guan-Hong Liou, Yen-Yu Su and Mark Po-Hung Lin

12:00 -12:30

Generation of Lifetime-Aware Pareto-Optimal Fronts Using a Stochastic Reliability Simulator
A. Toro-Frias, P. Saraza-Canflanca, F. Passos, P. Martin-Lloret, R. Castro-Lopez, E. Roca, J. Martin-Martinez, R. Rodriguez, M. Nafria and F. V. Fernandez

12:30 -13:00

MixLock: Securing Mixed-Signal Circuits via Logic Locking
Julian Leonhard, Muhammad Yasin, Shadi Turk, Mohammed Thari Nabeel, Marie-Minerve Louërat, Roselyne Chotin-Avot, Hassan Aboushady, Ozgur Sinanoglu and Haralampos-G. Stratigopoulos

Session TitleComputational and resource-efficiency in quantum and approximate computing
Session Code / Room2.6 / Room 6
Date / TimeTuesday, March 26, 2019/ 11:30 – 13:00
ChairMartin Trefzer, University of York, UK
Co-ChairLukas Sekanina, Brno University of Technology, CZ

11:30 -12:00

Matrix-Vector vs. Matrix-Matrix Multiplication: Potential in DD-based Simulation of Quantum Computations
Alwin Zulehner and Robert Wille

12:00 -12:30

Automated Circuit Approximation Method Driven by Data Distribution
Zdenek Vasicek, Vojtech Mrazek and Lukas Sekanina

12:30 -12:45

Trading Digital Accuracy for Power in an RSSI Computation of a Sensor Network Transceiver
Paul Detterer, Cumhur Erdin, Majid Nabi, José Pineda de Gyvez, Twan Basten and Hailong Jiao

12:45 -13:00

Approximate Random Dropout for DNN training acceleration in GPGPU
Zhuoran Song, Ru Wang, Dongyu Ru, Zhenghao Peng, Hongru Huang, Hai Zhao, Xiaoyao Liang and Li Jiang

Session TitleAnalysis and optimization techniques for neural networks
Session Code / Room2.7 / Room 7
Date / TimeTuesday, March 26, 2019 / 11:30 – 13:00
ChairSai Pudukot, Georg Mason University, US
Co-ChairMohamed Sabry, NTU, SG

11:30 -12:00

Low-Complexity Dynamic Channel Scaling of Noise-Resilient CNN for Intelligent Edge Devices
Younghoon Byun, Minho Ha, Jeonghun Kim, Sunggu Lee and Youngjoo Lee

12:00 -12:30

Data Locality Optimization of Depthwise Separable Convolutions for CNN Inference Accelerators
Hao-Ning Wu and Chih-Tsun Huang

12:30 -13:00

A Binary Learning Framework for Hyperdimensional Computing
Mohsen Imani, John Messerly, Fan Wu, Wang Pi and Tajana Rosing

Session TitleHow Electronic Systems can benefit from Machine Learning and from ESD Alliance
Session Code / Room2.8 / Exhibition Theatre
Date / TimeTuesday, March 26, 2019 / 11:30 – 13:00
OrganiserJürgen Haase, edacentrum, DE

11:30 -12:00

Machine Learning is Changing the Game for Variability and Characterization and will soon help Aanalog and Digital Verification
Amit Gupta

12:00 -12:30

Machine Learning at the Edge for Embedded and Low Power Platforms: Exploiting the intel movidius Neural Computing Stick
Gionata Benelli

12:30 -13:00

The ESD Alliance - at the center of the Semiconductor Universe
Paul Cohen

Session TitleLunch Time Keynote Session
Session Code / Room3.0 / Room 1
Date / TimeTuesday, March 26, 2019 / 13:50 – 14:20
ChairMarco Casale-Rossi, Synopsys, IT
Co-ChairGiovanni De Micheli, EPFL, CH

13:50 – 14:20

Keynote Address 3: Leonardo da Vinci, Humanism and Engineering between Florence and Milan
Claudio Giorgione

Session TitleExecutive Session 2: Panel "Semiconductor IP, Surfing the Next Big Wave
Session Code / Room3.1 / Room 1
Date / TimeTuesday, March 26, 2019 / 14:30 – 16:00
ChairRaul Camposano, Sage Design Automation, US

14:30 - 16:00

Semiconductor IP, Surfing the Next Big Wave

Session TitleSpecial Session: Smart Resource Management and Design Space Exploration for Heterogenous Processors
Session Code / Room3.2 / Room 2
Date / TimeTuesday, March 26, 2019 / 14:30 – 16:00
ChairPetru Eles, Linkoping University, SE
Co-ChairSudeep Pasricha, Colorado State University, US

14:30 -15:00

Smart Thermal Management for Heterogeneous Multicores
Jörg Henkel, Heba Khdr and Martin Rapp

15:00 -15:30

Design and Optimization of Heterogeneous Manycore Systems enabled by Emerging Interconnect Technologies: Promises and Challenges
Biresh Kumar Joardar, Ryan Gary Kim, Janardhan Rao Doppa and Partha Pratim Pande

15:30 -16:00

Power and Thermal Analysis of Commercial Mobile Platforms: Experiments and Case Studies
Ganapati Bhat, Suat Gumussoy and Umit Y. Ogras

Session TitleMethods and Characterisation techniques for Reliability
Session Code / Room3.3 / Room 3
Date / TimeTuesday, March 26, 2019 / 14:30 - 16:00
chairSaid Hamdioui, TU Delft, NL
Co-chairArnaud Virazel, LIRMM, FR

14:30 -15:00

New method for the automated massive characterization of Bias Temperature Instability in CMOS transistors
P. Saraza-Canflanca, J. Diaz-Fortuny, R. Castro-Lopez, E. Roca, J. Martin-Martinez, R. Rodriguez, M. Nafria and F. V. Fernandez

15:00 -15:30

Guilty As Charged: Computational Reliability Threats Posed By Electrostatic Discharge-induced Soft Errors
Keven Feng, Sandeep Vora, Rui Jiang, Elyse Rosenbaum and Shobha Vasudevan

15:30 -16:00

Methodology for Application-Dependent Degradation Analysis of Memory Timing
Daniël Kraak, Innocent Agbo, Mottaqiallah Taouil, Said Hamdioui, Pieter Weckx, Stefan Cosemans and Francky Catthoor

Session TitlePhysical Design, Extraction and Timing Analysis
Session Code / Room3.4 / Room 4
Date / TimeTuesday, March 26, 2019/ 14:30 – 16:00
ChairPatrick Groeneveld, Cadence Design Systems, US
Co-ChairPo-Hung Lin Mark, National Chung Cheng University, TW

14:30 -15:00

“Unobserved Corner” Prediction: Reducing Timing Analysis Effort for Faster Design Convergence in Advanced-Node Design
Andrew B. Kahng, Uday Mallappa, Lawrence Saul and Shangyuan Tong

15:00 -15:15

Dim Sum: Light Clock Tree by Small Diameter Sum
Gengjie Chen and Evangeline Young

15:15 -15:30

Routability-Driven Macro Placement with Embedded CNN-Based Prediction Model
Yu-Hung Huang, Zhiyao Xie, Guan-Qi Fang, Tao-Chun Yu, Haoxing Ren, Shao-Yun Fang, Yiran Chen and Jiang Hu

15:30 -15:45

RTL-Aware Dataflow-Driven Macro Placement
Alex Vidal-Obiols, Jordi Cortadella, Jordi Petit, Marc Galceran-Oms and Ferran Martorell

15:45 -16:00

Realizing Reproducible and Reusable Parallel Floating Random Walk Solvers for Practical Usage
Mingye Song, Zhezhao Xu, Wenjian Yu and Lei Yin

Session TitleHardware authentication and attack prevention
Session Code / Room3.5 /Room 5
Date / TimeTuesday, March 26, 2019 / 14:30 – 16:00
ChairJohanna Sepulveda, TU Munich, DE
Co-ChairIlia Polian, University of Stuttgart, DE

14:30 -15:00

Optically Interrogated Unique Object with Simulation Attack Prevention
Povilas Marcinkevicius, Ibrahim Ethem Bagci, Nema M. Abdelazim, Christopher S. Woodhead, Robert J. Young and Utz Roedig

15:00 -15:30

PUFs Deep Attacks: Enhanced modeling attacks using deep learning techniques to break the security of double arbiter PUFs
Mahmoud Khalafalla and Catherine Gebotys

15:30 -16:00

Desieve the Attacker: Thwarting IP Theft in Sieve-Valve-based Biochips
Mohammed Shayan, Sukanta Bhattacharjee, Yong-Ak Song, Krishnendu Chakrabart and Ramesh Karri

Session TitleSoftware Solutions for Reliable Memories
Session Code / Room3.6 / Room 6
Date / TimeTuesday, March 26, 2019 / 14:30 – 16:00
ChairValentin Gherman, CEA-LETI, FR
Co-ChairBorzoo Bonakdarpour, Iowa State University, US

14:30 -15:00

PATCH: Process-Variation-Resilient Space Allocation for Open-Channel SSD with 3D Flash
Jing Chen, Yi Wang, Amelie Chi Zhou, Rui Mao and Tao Li

15:00 -15:30

Compiler-Directed and Architecture-Independent Mitigation of Read Disturbance Errors in STT-RAM
Fateme S. Hosseini and Chengmo Yang

15:30 -16:00

A Wear Leveling Aware Memory Allocator for Both Stack and Heap Management in PCM-based Main Memory Systems
Wei Li, Ziqi Shuai, Chun Xue, Mengting Yuan and Qingan Li

Session TitleDesign Automation of Cyber-Physical Systems
Session Code / Room3.7 / Room 7
Date / TimeTuesday, March 26, 2019 / 14:30 – 16:00
ChairLei Bu, Nanjing University, CN
Co-ChairStefano Centomo, University of Verona, IT

14:30 -15:00

Exploiting System Dynamics for Resource-Efficient Automotive CPS Design
Leslie Maldonado, Wanli Chang, Debayan Roy, Anuradha Annaswamy, Dip Goswami and Samarjit Chakraborty

15:00 -15:30

Implementation-aware design of image-based control with on-line measurable variable-delay
Róbinson Medina, Sander Stuijk, Dip Goswami and Twan Basten

15:30 -16:00

Optimizing Assume-Guarantee Contracts for Cyber-Physical System Design
Chanwook Oh, Eunsuk Kang, Shinichi Shiraishi and Pierluigi Nuzzo

Session TitleDFG Collaborative Funding Instruments
Session Code / Room3.8 / Exhibition Theatre
Date / TimeTuesday, March 26, 2019 / 14:30 – 16:00
ChairAndreas Raabe, DFG, DE

14:30 -14:45

DFG Collaborative Funding Instruments - An Overview
Andreas Raabe

14:45 -14:52

Priority Program: SPP1648 Software for Exascale Computing
Hans-Joachim Bungartz

14:52 -15:00

Priority Program: SPP2037 Scalable Data management for Future Hardware
Kai-Uwe Sattler

15:00 -15:07

Research Unit: for1800 Controlling Concurrent Change - Towards Self-Aware Automotive and Space Vehicles
Rolf Ernst

15:07 -15:15

Collaborative Research Centre: SFB 901 on-the-fly Computing
Marco Platzner

15:15 -15:22

Collaborative Research Centre: SFB 876 Providing information by Resource-constrained Data Analysis
Jian-Jia Chen

15:22 -15:30

Transregional Research centre: TR89 Invasive Computing
Jürgen Teich

15:30 -15:37

Collaborative Research Centre: SFB 912 Highly Adaptive Energy Efficient Computing
Gerhard Fettweis

15:37 -16:00

BI-National Research Project: Conquering MPSOC Complexity with Principles of a Self-Aware Information
Andreas Herkersdorf

Session Title Interactive Presentations
Session Code / RoomIP1 / Poster Area
Date / TimeTuesday, March 26, 2019 / 16:00 – 16:30


Fault Injection on Hidden Registers in a RISC-V Rocket processor and Software Countermeasures
Johan Laurent, Vincent Beroulle, Christophe Deleuze and Florian Pebay-Peyroula


Methodology for EM Fault Injection: Charge-based Fault Model
Haohao Liao and Catherine Gebotys


Securing Cryptographic Circuits by Exploiting Implementation Diversity and Partial Reconfiguration on FPGAs
Benjamin Hettwer, Johannes Petersen, Stefan Gehrer, Heike Neumann and Tim Güneysu


STT-ANGIE: Asynchronous True Random Number Generator Using STT-MTJ
Ben Perach and Shahar Kvatinsky


Adaptive Transient Leakage-Aware Linearised Model for Thermal Analysis of 3-D ICs
Chao Zhang, Milan Mihajlović and Vasilis Pavlidis


FastCool: Leakage Aware Dynamic Thermal Management of 3D Memories
Lokesh Siddhu and Preeti Ranjan Panda


On the use of causal feature selection in the context of machine-learning indirect test
M. J. Barragan, G. Leger, F. Cilici, E. Lauga-Larroze, S. Bourdel and S. Mir


Accuracy and Compactness in Decision Diagrams for Quantum Computation
Alwin Zulehner, Philipp Niemann, Rolf Drechsler and Robert Wille


One Method - All Error-Metrics: A Three-Stage Approach for Error-Metric Evaluation in Approximate Computing
Saman Froehlich, Daniel Große and Rolf Drechsler


Reversible Pebbling Game for Quantum Memory Management
Giulia Meuli, Mathias Soeken, Martin Roetteler, Nikolaj Bjorner and Giovanni De Micheli


TypeCNN: CNN Development Framework With Flexible Data Types
Petr Rek and Lukas Sekanina


Guaranteed Compression Rate for Activations in CNNs using a Frequency Pruning Approach
Sebastian Vogel, Christoph Schorn, Andre Guntoro and Gerd Ascheid


Runtime Monitoring Neuron Activation Patterns
Chih-Hong Cheng, Georg Nührenberg and Hirotoshi Yasuoka


Chip Health Tracking Using Dynamic In-Situ Delay Monitoring
Hadi Ahmadi Balef, Kees Goossens and José Pineda de Gyvez


PCFI: Program Counter Guided Fault Injection for Accelerating GPU Reliability Assessment
Fritz G. Previlon, Charu Kalra, Devesh Tiwari and David R. Kaeli


Characterizing the Reliability and Threshold Voltage Shifting of 3D Charge Trap NAND Flash
Weihua Liu, Fei Wu, Meng Zhang, Yifei Wang, Zhonghai Lu, Xiangfeng Lu and Changsheng Xie


Hidden-Delay-Fault Sensor for Test, Reliability and Security
Giorgio Di Natale, Elena Ioana Vatajelu, Kalpana SENTHAMARAI KANNAN and Lorena Anghel


Effect of Device Variation on mapping Binary Neural Network to Memristor Crossbar Array
Wooseok Yi, Yulhwa Kim and Jae-Joon Kim


Accurate Wirelength Prediction for Placement-Aware Synthesis through Machine Learning
Daijoon Hyun, Yuepeng Fan and Youngsoo Shin


A Mixed-Height Standard Cell Placement Flow for Digital Circuit Blocks
Yi-Cheng Zhao, Yu-Chieh Lin, Ting-Chi Wang, Ting-Hsiung Wang, Yun-Ru Wu, Hsin-Chang Lin and Shu-Yi Kao


Aggressive Memory Speculation in HW/SW Co-Designed Machines
Simon Rokicki, Erven Rohou and Steven Derrien

Session Title Executive Session 3: The Future of Test
Session Code / Room4.1 / Room 1
Date / TimeTuesday, March 26, 2019 / 17:00 – 18:30
Chair:Subhasish Mitra, Stanford University, US


Yield and Reliability Challenges and Solutions at 7nm and below
Andrzej Strojwas


Three Possible Alternate Realities for the Future of Test
Jeff Rearick


What about the Design and Test of Quantum Computers?
Leon Stok

Session Title Reconfigurable Architecture and Tools
Session Code / Room4.2 / Room 2
Date / TimeTuesday, March 26, 2019 / 17:00 – 18:30
Chair:Smail Niar, Université Polytechnique Hauts-de-France, FR
Co-Chair:Lars Bauer, Karlsruhe Institute of Technology, DE

17:00 -17:30

Context-memory Aware Mapping for Energy Efficient Acceleration with CGRAs
Satyajit Das, Kevin J. M. Martin and Philippe Coussy

17:30 -18:00

Thermal-Aware Design and Flow for FPGA Performance Improvement
Behnam Khaleghi and Tajana Šimunić Rosing

18:00 -18:30

FIXER: Flow Integrity Extensions for Embedded RISC-V
Asmit De, Aditya Basu, Swaroop Ghosh and Trent Jaeger

Session Title Improving test generation and coverage
Session Code / Room4.3 / Room 3
Date / TimeTuesday, March 26, 2019 / 17:00 – 18:30
Chair:Jaan Raik, Tallinn University of Technology, EE
Co-Chair:Sara Vinco, Polytechnic of Turin, IT

17:00 -17:30

Automated Activation of Multiple Targets in RTL Models using Concolic Testing
Yangdi Lyu, Alif Ahmed and Prabhat Mishra

17:30 -18:00

Verifying Instruction Set Simulators using Coverage-guided Fuzzing
Vladimir Herdt, Daniel Große, Hoang M. Le and Rolf Drechsler

18:00 -18:30

Data Flow Testing for SystemC-AMS Timed Data Flow Models
Muhammad Hassan, Daniel Große, Hoang M. Le and Rolf Drechsler

Session Title Digital processing with emerging memory technologies
Session Code / Room4.4 / Room 4
Date / TimeTuesday, March 26, 2019 / 17:00 – 18:30
Chair:Shahar Kvatinsky, Technion, IL
Co-Chair:Elena-Ioana Vataleju, TIMA, FR

17:00 -17:30

SAID: A Supergate-Aided Logic Synthesis Flow for Memristive Crossbars
Valerio Tenace, Roberto G. Rizzo, Debjyoti Bhattacharjee, Anupam Chattopadhyay and Andrea Calimera

17:30 -18:00

GraphS: A Graph Processing Accelerator Leveraging SOT-MRAM
Shaahin Angizi, Jiao Sun, Wei Zhang and Deliang Fan

18:00 -18:15

CORN: In-Buffer Computing for Binary Neural Network
Liang Chang, Xin Ma, Zhaohao Wang, Youguang Zhang, Weisheng Zhao and Yuan Xie

18:15 -18:30

An Energy Efficient Non-Volatile Flip-Flop based on CoMET Technology
Robert Perricone, Zhaoxin Liang, Meghna G. Mankalale, Michael Niemier, Sachin S. Sapatnekar, Jian-Ping Wang and X. Sharon Hu

Session Title Hardware Trojans and Split Manufacturing
Session Code / Room4.5 / Room 5
Date / TimeTuesday, March 26, 2019 / 17:00 – 18:30
Chair:Nele Mentens, KU leuven, BE
Co-Chair:Giorgio Di Natale, TIMA, FR

17:00 -17:30

Hardware Trojans in Emerging Non-Volatile Memories
Mohammad Nasim Imtiaz Khan, Karthikeyan Nagarajan and Swaroop Ghosh

17:30 -18:00

Evaluating Assertion Set Completeness to Expose Hardware Trojans and Verification Blindspots
Nicole Fern and Kwang-Ting (Tim) Cheng

18:00 -18:15

Efficient Test Generation for Trojan Detection using Side Channel Analysis
Yangdi Lyu and Prabhat Mishra

18:15 -18:30

A New Paradigm in Split Manufacturing: Lock the FEOL, Unlock at the BEOL
Abhrajit Sengupta, Mohammed Nabeel, Johann Knetchel and Ozgur Sinanoglu

Session Title Smart Communication Solutions for Automotive Systems
Session Code / Room4.6 / Room 6
Date / TimeTuesday, March 26, 2019 / 17:00 – 18:30
Chair:Dirk Ziegenbein, Robert Bosch GmbH, DE
Co-Chair:Selma Saidi, Hamburg University of Technology, DE

17:00 -17:30

Design Optimization of Frame Preemption in Real-Time Switched Ethernet
Taeju Park, Soheil Samii and Kang G. Shin

17:30 -18:00

CUBA: Chained Unanimous Byzantine Agreement for Decentralized Platoon Management
Emanuel Regnath and Sebastian Steinhorst

18:00 -18:30

Decentralized Non-Neighbor Active Charge Balancing in Large Battery Packs
Alexander Lamprecht, Martin Baumann, Tobias Massier and Sebastian Steinhorst

Session Title Energy and power efficiency in GPU-based systems
Session Code / Room4.7 / Room 7
Date / TimeTuesday, March 26, 2019 / 17:00 – 18:30
Chair:Muhammad Shafique, TU Wien, AT
Co-Chair:William Fornaciari, Politecnico di Milano, IT

17:00 -17:30

TEEM: Online Thermal- and Energy-Efficiency Management on CPU-GPU MPSoCs
Samuel Isuwa, Somdip Dey, Amit Kumar Singh and Klaus McDonald-Maier

17:30 -18:00

Predicting Critical Warps in Near-Threshold GPGPU Applications using a Dynamic Choke Point Analysis
Sourav Sanyal, Prabal Basu, Aatreyi Bal, Sanghamitra Roy and Koushik Chakraborty

18:00 -18:30

Fast and Low-Precision Learning in GPU-Accelerated Spiking Neural Network
Xueyuan She, Yun Long and Saibal Mukhopadhyay

Session TitleEmbedded Tutorial: Paving the Way for Very Large Scale Integration of Superconductive Electronics
Session Code / Room4.8 / Exh. Theatre
Date / TimeTuesday, March 26, 2019 / 17:00 – 18:30
Chair:Jamil Kawa, Synopsys, US


Physics-based Modeling and Device Simulation of Josephson Junctions
Pooya Jannaty


Architectures, Synthesis Flow, and Place & Route engine for DC-Biased SFQ logic Circuits
Massoud Pedram


Library Design and Design tools for Adiabatic Quantum-flux-parametron Logic Circuits (AC-biased SFQ Logic)
Nobuyuki Yoshikawa

Session TitleSpecial Day on "Embedded Meets Hyperscale and HPC" Session: Heterogeneous Computing in the Datacenter and in HPC
Session Code / Room5.1 / Room 1
Date / TimeWednesday, March 27, 2019 / 08:30 – 10:00
ChairChristian Plessl, Paderborn University, DE
Co-ChairChristoph Hagleitner, IBM Research, CH


Silicon Heterogeneity in the Cloud
Babak Falsafi


GPU Accelerated Computing in HPC and in the Data Center
Peter Messmer


Heterogeneous Compute Architectures for Deep Learning in the Cloud
Ken O'Brien

Session TitleImproving Formal Verification and Applications to GPUs and High-Level Synthesis
Session Code / Room5.2 / Room 2
Date / TimeWednesday, March 27, 2019 / 08:30 – 10:00
ChairAlessandro Cimatti, Fondazione Bruno Kessler, IT
Co-ChairGianpiero Cabodi, Politecnico di Torino, IT

8:30 -9:00

fbPDR: In-depth combination of forward and backward analysis in Property Directed Reachability
Tobias Seufert and Christoph Scholl

9:00 -9:30

High Coverage Concolic Equivalence Checking
Pritam Roy, Sagar Chaki and Pankaj Chauhan

9:30 -9:45

Bosphorus: Bridging ANF and CNF Solvers
Davin Choo, Mate Soos, Kian Ming A. Chai and Kuldeep S Meel

9:45 -10:00

CUDA au Coq: A Framework for Machine-validating GPU Assembly Programs
Benjamin Ferrell, Jun Duan and Kevin W. Hamlen

Session TitleEU Projects
Session Code / Room5.3 / Room 3
Date / TimeWednesday, March 27, 2019 / 08:30 – 10:00
ChairMartin Schoeberl, Technical University of Denmark, DK

8:30 -9:00

AXIOM: A Scalable, Efficient and Reconfigurable Embedded Platform
Roberto Giorgi, Marco Procaccini and Farnam Khalili

9:00 -9:15

Applications of Computation-In-Memory Architectures based on Memristive Devices
Said Hamdioui, Hoang Anh Du Nguyen, Mottaqiallah Taouil, Abu Sebastian, Manuel Le Gallo, Sandeep Pande, Siebren Schaafsma, Francky Catthoor, Shidhartha Das, Fernando G. Redondo, G. Karunaratne, Abbas Rahimi and Luca Benini

9:15 -9:30

Chip-to-Cloud: an Autonomous and Energy Efficient Platform for Smart Vision Applications
A. Scionti, S. Ciccia, O. Terzo and G. Giordanengo

9:30 -9:45

On the Use of Hackathons to Enhance Collaboration in Large Collaborative Projects
Andrey Sadovykh, Dragos Truscan, Pierluigi Pierini, Gunnar Widforss, Adnan Ashraf, Hugo Bruneliere, Pavel Smrz, Alessandra Bagnato, Wasif Afzal and Alexandra Espinosa Hortelano

9:45 -10:00

Realization of Four-Terminal Switching Lattices: Technology Development and Circuit Modeling
Serzat Safaltin, Oguz Gencer, M. Ceylan Morgul, Levent Aksoy, Sebahattin Gurmen, Csaba Andras Moritz and Mustafa Altun

Session TitleEmerging technologies for better NoCs
Session Code / Room5.4 / Room 4
Date / TimeWednesday, March 27, 2019 / 08:30 – 10:00
ChairDavide Bertozzi, Università di Ferrara, IT
Co-ChairGilles Sassatelli, LIRMM CNRS / University of Montpellier, FR

8:30 -9:00

SiPterposer: A Fault-Tolerant Substrate for Flexible System-in-Package Design
Pete Ehrett, Todd Austin and Valeria Bertacco

9:00 -9:30

WAVES: Wavelength Selection for Power-Efficient 2.5D-Integrated Photonic NoCs
Aditya Narayan, Yvain Thonnart, Pascal Vivet, César Fuguet Tortolero and Ayse K. Coskun

9:30 -10:00

REGENT: A Heterogeneous ReRAM/GPU-based Architecture Enabled by NoC for Training CNNs
Biresh Kumar Joardar, Bing Li, Janardhan Rao Doppa, Hai Li, Partha Pratim Pande and Krishnendu Chakrabarty

Session TitleHardware Obfuscation
Session Code / Room5.5 / Room 5
Date / TimeWednesday, March 27, 2019 / 08:30 – 10:00
ChairFrancesco Regazzoni, ALARI-USI, CH
Co-ChairDaniel Grosse, University of Bremen, DE

8:30 -9:00

Design Obfuscation through Selective Post-Fabrication Transistor-Level Programming
Mustafa M. Shihab, Jingxiang Tian, Gaurav Rajavendra Reddy, Bo Hu, William Swartz Jr., Benjamin Carrion Schaefer, Carl Sechen and Yiorgos Makris

9:00 -9:30

KC2: Key-Condition Crunching for Fast Sequential Circuit Deobfuscation
Kaveh Shamsi, Meng Li, David Z. Pan and Yier Jin

9:30 -10:00

Piercing Logic Locking Keys through Redundancy Identification
Leon Li and Alex Orailoglu

Session TitleEnergy efficiency in IoT - Edge to Cloud
Session Code / Room5.6 / Room 6
Date / TimeWednesday, March 27, 2019 / 08:30 – 10:00
ChairSemeen Rehman, TU Wien, AT
ChairBaris Aksanli, San Diego State University, US

8:30 -9:00

FlexiCheck: An Adaptive Checkpointing Architecture for Energy Harvesting Devices
Priyanka Singla, Shubhankar Suman Singh and Smruti R. Sarangi

9:00 -9:30

Hardware-Accelerated Energy-Efficient Synchronization and Communication for Ultra-Low-Power Tightly Coupled Clusters
Florian Glaser, Germain Haugou, Davide Rossi, Qiuting Huang and Luca Benini

9:30 -10:00

MAMUT: Multi-Agent Reinforcement Learning for Efficient Real-Time Multi-User Video Transcoding
Luis Costero, Arman Iranfar, Marina Zapater, Francisco D. Igual, Katzalin Olcoz and David Atienza

Session TitleData-driven Acceleration
Session Code / Room5.7 / Room 7
Date / TimeWednesday, March 27, 2019/ 08:30 – 10:00
ChairAnca Molnos, CEA-LETI, FR
Co-ChairBorzoo Bonakdarpour, Iowa State University, US

8:30 -9:00

A compiler for Automatic Selection of Suitable Processing-in-Memory Instructions
Hameeza Ahmed, Paulo C. Santos, João P. C. Lima, Rafael F. Moura, Marco A. Z. Alves, Antônio C. S. Beck and Luigi Carro

9:00 -9:30

Cache-Aware Kernel Tiling: An Approach for System-Level Performance Optimization of GPU-Based Applications
Arian Maghazeh, Sudipta Chattopadhyay, Petru Eles and Zebo Peng

9:30 -10:00

Data Subsetting: A Data-Centric Approach to Approximate Computing
Younghoon Kim, Swagath Venkataramani, Nitin Chandrachoodan and Anand Raghunathan

Session TitleSpecial Session: The ARAMiS II Project - Efficient Use of Multicore for safety-critical Applications
Session Code / Room5.8 / Exh. Theatre
Date / TimeWednesday, March 27, 2019/ 08:30 – 10:00
ChairTimo Sandmann, KIT, DE


ARAMiS II Project Overview
Rolf Ernst


ARAMiS II Development Process for Model-based Multicore Software Development
Kuntz Stefan


Methods and Tools supporting Multicore Development
Bernhard Bauer


Automotive Powertrain Demonstrator
Sebastian Kehr

Session Title Interactive Presentations
Session Code / RoomIP2 / Poster Area
Date / TimeWednesday, March 27, 2019 / 10:00 – 10:30


TransRec: Improving Adaptability in Single-ISA Heterogeneous Systems with Transparent and Reconfigurable Acceleration
Marcelo Brandalero, Muhammad Shafique, Luigi Carro and Antonio Carlos Schneider Beck


CADE: Configurable Approximate Divider for Energy Efficiency
Mohsen Imani, Ricardo Garcia, Andrew Huang and Tajana Rosing


HCFTL: A Locality-Aware Page-Level Flash Translation Layer
Hao Chen, Cheng Li, Yubiao Pan, Min Lyu, Yongkun Li and Yinlong Xu


Model Checking is Possible to Verify Large-scale Vehicle Distributed Application Systems
Haitao Zhang, Ayang Tuo and Guoqiang Li


Automatic Assertion Generation from Natural Language Specifications Using Subtree Analysis
Junchen Zhao and Ian G. Harris


Detection of Hardware Trojans in SystemC HLS Designs via Coverage-guided Fuzzing
Hoang M. Le, Daniel Große, Niklas Bruns and Rolf Drechsler


Design Optimization for Hardware-Based Message Filters in Broadcast Buses
Lea Schönberger, Georg von der Brüggen, Horst Schirmeier and Jian-Jia Chen


Vehicle Sequence Reordering with Cooperative Adaptive Cruise Control
Ta-Wei Huang, Yun-Yun Tsai, Chung-Wei Lin and Tsung-Yi Ho


Using Statistical Model Checking to Assess Reliability for Bathtub-Shaped Failure Rates
Josef Strnadel


Empirical Evaluation of IC3-based Model Checking Techniques on Verilog RTL Designs
Aman Goel and Karem Sakallah


Co-design Implications of Cost-effective On-demand Acceleration for Cloud Healthcare Analytics: The AEGLE approach
Dimosthenis Masouros, Konstantina Koliogeorgi, Georgios Zervakis, Alexandra Kosvyra, Achilleas Chytas, Sotirios Xydis, Ioanna Chouvarda and Dimitrios Soudris


Modular FPGA Acceleration of Data Analytics in Heterogenous Computing
Elias Koromilas, Christoforos Kachris, Dimitrios Soudris, Francisco J. Ballesteros, Patricio Martinez and Ricardo Jimenez-Peris


ACDC: An Accuracy- and Congestion-aware Dynamic Traffic Control Method for Networks-on-Chip
Siyuan Xiao, Xiaohang Wang, Maurizio Palesi, Amit Kumar Singh and Terrence Mak


Power and Performance Optimal NoC Design for CPU-GPU Architecture Using Formal Models
Lulwah Alhubail and Nader Bagherzadeh


Deep Learning-Based Circuit Recognition Using Sparse Mapping and Level-Dependent Decaying Sum Circuit Representations
Arash Fayyazi, Soheil Shababi, Pierluigi Nuzzo, Shahin Nazarian and Massoud Pedram


Partial Encryption of Behavioral IPs to Selectively Control the Design Space in High-Level Synthesis
Zi Wang and Benjamin Carrion Schaefer


Software-Hardware Co-Design of Multi-Standard Digital Baseband Processor for IoT
Hela Belhadj Amor and Carolynn Bernier


Taming Data Caches for Predictable Execution on GPU-based SoCs
Björn Forsberg, Luca Benini and Andrea Marongiu


Design and Evaluation of SmallFloat SIMD extensions to the RISC-V ISA
Giuseppe Tagliavini, Stefan Mach, Davide Rossi, Andrea Marongiu and Luca Benini


vDARM: Dynamic Adaptive Resource Management for Virtualized Multiprocessor Systems
Jianmin Qian, Jian Li, Ruhui Ma and Haibing Guan

Session TitleSpecial Day on "Embedded Meets Hyperscale and HPC" Session: Near-memory computing
Session Code / Room6.1 / Room 1
Date / TimeWednesday, March 27, 2019 / 11:00 – 12:30
ChairChristoph Hagleitner, IBM Research, CH
Co-ChairChristian Plessl, Paderborn University, DE

11:00 -11:30

NTX: An energy-efficient streaming accelerator for floating-point generalized reduction workloads in 22nm FD-SOI
Fabian Schuiki, Michael Schaffner and Luca Benini

11:00 -11:30

Near-memory Processing: It's the Hardware and Software, Silly!
Boris Grot

11:00 -11:30

Coherently Attached Programmable Near-memory Acceleration Platform and its Application to Stencil Processing
Jan van Lunteren, Ronald Luijten, Dionysios Diamantopoulos, Florian Auernhammer, Christoph Hagleitner, Lorenzo Chelini, Stefano Corda and Gagandeep Singh

Session TitleSpecial Session: 3D Sensor - Hardware to Application
Session Code / Room6.2 / Room 2
Date / TimeWednesday, March 27, 2019 / 11:00 – 12:30
ChairFabien Clermidy, CEA-LETI, FR
Co-ChairPascal Vivet, CEA-LETI, FR

11:00 -11:22

Advanced 3D Technologies and Architectures for 3D Smart Image Sensors
Pascal Vivet, Gilles Sicard, Laurent Millet, Stephane Chevobbe, Karim Ben Chehida, Luis Angel Cubero MonteAlegre, Maxence Bouvier, Alexandre Valentian, Maria Lepecq, Thomas Dombek, Olivier Bichler, Sebastien Thuriès, Didier Lattard, Cheramy Séverine, Perrine Batude and Fabien Clermidy

11:22 -11:44

A Camera with Brain - Embedding Machine Learning in 3D Sensors
Burhan Ahmad Mudassar, Priyabrata Saha, Yun Long, Muhammad Faisal Amir, Evan Gebhardt, Taesik Na, Jong Hwan Ko, Marilyn Wolf and Saibal Mukhopadhyay

11:44 -12:06

IoT2 - the Internet of Tiny Things: Realizing mm-scale sensors through 3D die stacking
Sechang Oh, Minchang Cho, Xiao Wu, Yejoong Kim, Li-Xuan Chuo, Wootaek Lim, Pat Pannuto, Suyoung Bang, Kaiyuan Yang, Hun-Seok Kim, Dennis Sylvester and David Blaauw

12:06 -12:30

3D Interconnects and Integration Technologies for Biosensor Systems
Muhannad Bakir

Session TitleWhen Approximation Meets Dependability
Session Code / Room6.3 / Room 3
Date / TimeWednesday, March 27, 2019/ 11:00 – 12:30
ChairGeorge Constantinides, Imperial College London, GB
Co-ChairRishad Shafik, Newcastle University, GB

11:00 -11:30

Sensor-Based Approximate Adder Design for Accelerating Error-Tolerant and Deep-Learning Applications
Ning-Chi Huang, Szu-Ying Chen and Kai-Chiang Wu

11:30 -12:00

Low-Power Variation-Aware Cores based on Dynamic Data-Dependent Bitwidth Truncation
Ioannis Tsiokanos, Lev Mukhanov and Georgios Karakonstantis

12:00 -12:30

A Smart Fault Detection Scheme for Reliable Image Processing Applications
Matteo Biasielli, Cristiana Bolchini, Luca Cassano and Antonio Miele

Session TitleHardware support for microarchitecture performance
Session Code / Room6.4 / Room 4
Date / TimeWednesday, March 27, 2019 / 11:00 – 12:30
ChairCristina Silvano, Politecnico di Milano, IT
Co-ChairSylvain Collange, INRIA/IRISA, FR

11:00 -11:30

Maximum-Contention Control Unit (MCCU): Resource Access Count and Contention Time Enforcement
Jordi Cardona, Carles Hernandez, Jaume Abella and Francisco J. Cazorla

11:30 -12:00

FIFOrder MicroArchitecture: Ready-Aware Instruction Scheduling for OoO Processors
Mehdi Alipour, Rakesh Kumar, Stefanos Kaxiras and David Black-Schaffer

12:00 -12:30

Boosting SIMD Benefits through a Run-time and Energy Efficient DLP Detection
Michael Guilherme Jordan, Tiago Knorst, Julio Vicenzi and Mateus Beck Rutzig

Session TitleSystem Level Security
Session Code / Room6.5 / Room 5
Date / TimeWednesday, March 27, 2019 / 11:00 – 12:30
ChairLionel Torres, University of Montpellier, FR
Co-ChairPascal Benoit, University of Montpellier, FR

11:00 -11:30

2SMaRT: A Two-Stage Machine Learning-Based Approach for Run-Time Specialized Hardware-Assisted Malware Detection
Hossein Sayadi, Hosein Mohammadi Makrani, Sai Manoj Pudukotai Dinakarrao, Tinoosh Mohsenin, Avesta Sasan, Setareh Rafatirad and Houman Homayoun

11:30 -12:00

Secure Intermittent Computing Protocol: Protecting State Across Power Loss
Archanaa S. Krishnan, Charles Suslowicz, Daniel Dinu and Patrick Schaumont

12:00 -12:15

RiskiM: Toward Complete Kernel Protection with Hardware Support
Dongil Hwang, Myonghoon Yang, Seongil Jeon, Younghan Lee, Donghyun Kwon and Yunheung Paek

12:15 -12:30

SACHa: Self-Attestation of Configurable Hardware
Jo Vliegen, Md Masoom Rabbani, Mauro Conti and Nele Mentens

Session TitleIntelligent Wearable and Implantable Sensors for Augmented Living
Session Code / Room6.6 / Room 6
Date / TimeWednesday, March 27, 2019 / 11:00 – 12:30
ChairDaniela De Venuto, Politecnico di Bari, IT
Co-ChairTheocharis Theocharides, University of Cyprus, CY

11:00 -11:30

Laelaps: An Energy-Efficient Seizure Detection Algorithm from Long-term Human iEEG Recordings without False Alarms
Alessio Burrello, Lukas Cavigelli, Kaspar Schindler, Luca Benini and Abbas Rahimi

11:30 -12:00

Automatic Time-Frequency Analysis of MRPs for Mind-controlled Mechatronic Devices
Daniela De Venuto and Giovanni Mezzina

12:00 -12:30

A Self-Learning Methodology for Epileptic Seizure Detection with Minimally-Supervised Edge Labeling
Damián Pascual, Amir Aminifar and David Atienza

Session TitleHow Secure and Verified is your Cyber-Physical System?
Session Code / Room6.7 / Room 7
Date / TimeWednesday, March 27, 2019 / 11:00 – 12:30
ChairWanli Chang, University of York, GB
Co-ChairMingsong Chen, East China Normal University, CN

11:00 -11:30

GAN-Sec: Generative Adversarial Network Modeling for the Security Analysis of Cyber-Physical Production Systems
Sujit Rokka Chhetri, Anthony Bahadir Lopez, Jiang Wan and Mohammad Abdullah Al Faruque

11:30 -12:00

Lightweight Node-level Malware Detection and Network-level Malware Confinement in IoT Networks
Sai Manoj Pudukotai Dinakarrao, Hossein Sayadi, Hosein Mohammadi Makrani, Cameron Nowzari, Setareh Rafatirad and Houman Homayoun

12:00 -12:15

Incremental Online Verification of Dynamic Cyber-Physical Systems
Lei Bu, Shaopeng Xing, Xinyue Ren, Yang Yang, Qixin Wang and Xuandong Li

12:15 -12:30

Self-Secured Control with Anomaly Detection and Recovery in Automotive Cyber-Physical Systems
Korosh Vatanparvar and Mohammad Abdullah Al Faruque

Session TitleTETRAMAX: Smart funding for digitalization of Europe's Industry
Session Code / Room6.8 / Exhibition Theatre
Date / TimeWednesday, March 27, 2019 / 11:00 – 12:30
ChairLuca Fanucci, University of Pisa, IT

11:00 -11:15

Presentation of TETRAMAX
Rainer Leupers

11:15 -11:30

Davide Rossi

11:30 -11:45

Antonio Solinas

11:45 -12:00

Neven Rusković

12:00 -12:15

EUROLAB4HPC - Joining Forces towards European Leadership in Exascale Computing Systems
Per Stenström

12:15 -12:30

Open Innovation Business based on Efficient Networking
Bernd Janson

Session TitleLunch Time Keynote Session
Session Code / Room7.0 / Room 1
Date / TimeWednesday, March 27, 2019 / 13:50 – 14:20
ChairChristoph Hagleitner, IBM Research, CH
Co-ChairChristian Plessl, Paderborn University, DE

13:50 – 14:20

Keynote Address 4: Heterogeneous, High Scale Computing in the Era of Intelligent, Cloud-Connected Devices
David Pellerin

Session TitleSpecial Day on "Embedded Meets Hyperscale and HPC" Session: Tools and Runtime Systems
Session Code / Room7.1 / Room 1
Date / TimeWednesday, March 27, 2019 / 14:30 – 16:00
ChairChristian Plessl, Paderborn University, DE
Co-ChairChristoph Hagleitner, IBM Research, CH

14:30 -15:00

Extreme Heterogeneity in High Performance Computing
Jeffrey S Vetter

15:00 -15:30

Homogenizing Heterogeneity: The OMPSS Approach
Jesus Labarta

15:30 -16:00

Automatic code Restructuring for FPGAS: Current status, Trends and Open issues
João M. P. Cardoso

Session TitleAccelerators using novel memory technologies
Session Code / Room7.2 / Room 2
Date / TimeWednesday, March 27, 2019 / 14:30 – 16:00
ChairMladen Berekovic, TU Braunschweig, DE
Co-ChairAndrea Marongiu, Università di Bologna, IT

14:30 -15:00

Time-division Multiplexing Automata Processor
Jintao Yu, Hoang Anh Du Nguyen, Muath Abu Lebdeh, Mottaqiallah Taouil and Said Hamdioui

15:00 -15:30

Near-Data Acceleration of Privacy-Preserving Biomarker Search with 3D-Stacked Memory
Alvin Oliver Glova, Itir Akgun, Shuangchen Li, Xing Hu and Yuan Xie

15:30 -16:00

Towards Cross-Platform Inference on Edge Devices with Emerging Neuromorphic Architecture
Shangyu Wu, Yi Wang, Amelie Chi Zhou, Rui Mao, Zili Shao and Tao Li

Session TitleCPU and GPU microarchitecture dependability
Session Code / Room7.3 / Room 3
Date / TimeWednesday, March 27, 2019 / 14:30 – 16:00
ChairMichail Maniatakos, NYU Abu Dhabi, UAE
Co-ChairNikolaos Foutris, University of Manchester, GB

14:30 -15:00

Error-Shielded Register Renaming Subsystem for a Dynamically Scheduled Out-of-Order Core
Ron Gabor, Yiannakis Sazeides, Arkady Bramnik, Alexandros Andreou, Chrysostomos Nicopoulos, Karyofyllis Patsidis, Dimitris Konstantinou and Giorgos Dimitrakopoulos

15:00 -15:30

LAEC: Look-Ahead Error Correction Codes in Embedded Processors L1 Data Cache
Pedro Benedicte, Carles Hernandez, Jaume Abella and Francisco J. Cazorla

15:30 -16:00

High-Integrity GPU Designs for Critical Real-Time Automotive Systems
Sergi Alcaide, Leonidas Kosmidis, Carles Hernandez and Jaume Abella

Session TitleLow Power Design: From Highly-Optimized Power Delivery Networks to CNN Accelerators
Session Code / Room7.4 / Room 4
Date / TimeWednesday, March 27, 2019 / 14:30 – 16:00
ChairPascal Vivet, CEA-LETI, FR
Co-ChairAndrea Bartolini, Università di Bologna

14:30 -15:00

Detailed Placement for IR Drop Mitigation by Power Staple Insertion in Sub-10nm VLSI
Sun ik Heo, Andrew Kahng, Minsoo Kim, Lutong Wang and Chutong Yang

15:00 -15:30

Optimizing the Energy Efficiency of Power Supply in Heterogeneous Multicore Chips with Integrated Switched-Capacitor Converters
Lu Wang, Leilei Wang, Dejia Shang, Cheng Zhuo and Pingqiang Zhou

15:30 -15:45

Power Delivery Pathfinding for Emerging Die-to-Wafer Integration Technology
Andrew B. Kahng, Seokhyeong Kang, Seungwon Kim, Kambiz Samadi and Bangqi Xu

15:45 -16:00

Energy-Efficient Convolutional Neural Networks via Recurrent Data Reuse
Luca Mocerino, Valerio Tenace and Andrea Calimera

Session TitleReliable and Persistent: From Cache to File system
Session Code / Room7.5 / Room 5
Date / TimeWednesday, March 27, 2019 / 14:30 – 16:00
ChairChengmo Yang, University of Delaware, US
Co-ChairAlexandre Levisse, EPFL - ESL, CH

14:30 -15:00

Enhancing Reliability of STT-MRAM Caches by Eliminating Read Disturbance Accumulation
Elham Cheshmikhani, Hamed Farbeh and Hossein Asadi

15:00 -15:30

UIMigrate: Adaptive Data Migration for Hybrid Non-Volatile Memory Systems
Yujuan Tan, Baiping Wang, Zhichao Yan, Qiuwei Deng, Xianzhang Chen and Duo Liu

15:30 -16:00

Reducing Write Amplification for Inodes of Journaling File Systems using Persistent Memory
Chaoshu Yang, Duo Liu, Xianzhang Chen, Runyu Zhang, Wenbin Wang, Moming Duan and Yujuan Tan

Session TitleOptimization of Smart Energy Systems
Session Code / Room7.6 / Room 6
Date / TimeWednesday, March 27, 2019 / 14:30 – 16:00
ChairDavide Quaglia, University of Verona, IT
Co-ChairMassimo Poncino, Politecnico di Torino, IT

14:30 -15:00

Cost/Privacy Co-optimization in Smart Energy Grids
Alma Pröbstl, Sangyoung Park, Sebastian Steinhorst and Samarjit Chakraborty

15:00 -15:30

A Low-Complexity Framework for Distributed Energy Market Targeting Smart-Grid
Kostas Siozios and Stylianos Siskos

15:30 -16:00

Irradiance-Driven Partial Reconfiguration of PV Panels
Daniele Jahier Pagliari, Sara Vinco, Enrico Macii and Massimo Poncino

Session TitleToward Correct and Secure Embedded Systems
Session Code / Room7.7 / Room 7
Date / TimeWednesday, March 27, 2019 / 14:30 – 16:00
ChairTodd Austin, University of Michigan, US
Co-ChairYlies Falcone, University Grenoble Alpes, FR

14:30 -15:00

Better Late Than Never Verification of Embedded Systems After Deployment
Martin Ring, Fritjof Bornebusch, Christoph Lüth, Robert Wille and Rolf Drechsler

15:00 -15:15

Efficient Computation of Deadline-Miss Probability and Potential Pitfalls
Kuan-Hsun Chen, Niklas Ueter, Georg von der Brüggen and Jian-Jia Chen

15:15 -15:30

FAdeML: Understanding the Impact of Pre-Processing Noise Filtering on Adversarial Machine Learning
Faiq Khalid, Muhammad Abdullah Hanif, Semeen Rehman, Junaid Qadir and Muhammad Shafique

15:30 -15:45

Real-Time Anomalous Branch Behavior Inference with a GPU-inspired Engine for Machine Learning Models
Hyunyoung Oh, Hayoon Yi, Hyeokjun Choe, Yeongpil Cho, Sungroh Yoon and Yunheung Paek

15:45 -16:00

TrojanZero: Switching Activity-Aware Design of Undetectable Hardware Trojans with Zero Power and Area Footprint
Imran Hafeez Abbassi, Faiq Khalid, Semeen Rehman, Awais Mehmood Kamboh, Axel Jantsch, Siddharth Garg and Muhammad Shafique

Session TitleInspiring futures! Careers Session @ DATE (part 1)
Session Code / Room7.8 / Exhibition Theatre
Date / TimeWednesday, March 27, 2019 / 14:30 – 16:00
ChairLuca Fanucci, University of Pisa, IT

14:30 -14:45

Academia or Industry? - or everything! Career and Internship Opportunities Powered by HIPEAC
Xavier Salazar

14:45 -15:15

How to Kick Start your Career in an Ever-changing World
Antonella Magliocchi

15:15 -15:30

Inspiring Futures @ Infineon Technologies
Simone Fontanesi

15:30 -15:45

Inspiring Futures @ Cadence
Anton Klotz

15:45 -16:00

Inspiring Futures @ Esilicon
Fernando De Bernardinis

Session TitleInteractive Presentations
Session Code / RoomIP3 / Poster Area
Date / TimeWednesday, March 27, 2019 / 16:00 – 16:30


Non-Intrusive Self-Test Library for Automotive Critical Applications: Constraints and Solutions
P. Bernardi, R. Cantoro, A. Floridia, D. Piumatti, C. Pogonea, A. Ruospo, E. Sanchez, S. De Luca and A. Sansonetti


Dependency-Resolving Intra-Unit Pipeline Architecture for High-Throughput Multipliers
Jihee Seo and Dae Hyun Kim


A Hardware-Efficient Logarithmic Multiplier with Improved Accuracy
Mohammad Saeed Ansari, Bruce F. Cockburn and Jie Han


Lightweight hardware support for selective coherence in heterogeneous manycore accelerators
Alessandro Cilardo, Mirko Gagliardi and Vincenzo Scotti


Functional Analysis Attacks on Logic Locking
Deepak Sirone and Pramod Subramanyan


SigAttack: New High-level SAT-based Attack on Logic Encryptions
Yuanqi Shen, You Li, Shuyu Kong, Amin Rezaei and Hai Zhou


ZeroPower Touch: Zero-Power Smart Receiver for Touch Communication and Sensing in Wearable Applications
Philipp Mayer, Raphael Strebel and Michele Magno


Tailoring SVM Inference for Resource-Efficient ECG-Based Epilepsy Monitors
Lorenzo Ferretti, Amir Aminifar, David Atienza, Leila Cammoun and Philippe Ryvlin


An indoor localization system to detect areas causing the freezing of gait in Parkinsonians
Florenc Demrozi, Vladislav Bragoi, Federico Tramarin and Graziano Pravadelli


Assembly-Related Chip/Package Co-Design of Heterogeneous Systems Manufactured by Micro-Transfer Printing
Robert Fischbach, Tilman Horst and Jens Lienig


Visual Inertial Odometry At the Edge: A Hardware-Software Co-design Approach for Ultra-low Latency and Power
Dipan Kumar Mandal, Srivatsava Jandhyala, Om J Omer, Gurpreet S Kalsi, Biji George, Gopi Neela, Santhosh Kumar Rethinagiri, Sreenivas Subramoney, Lance Hacking, Jim Radford, Eagle Jones, Belliappa Kuttanna and Hong Wang


CapsAcc: An Efficient Hardware Accelerator for CapsuleNets with Data Reuse
Alberto Marchisio, Muhammad Abdullah Hanif and Muhammad Shafique


SDCNN: An efficient sparse deconvolutional neural network accelerator on FPGA
Jung-Woo Chang, Keon-Woo Kang and Suk-Ju Kang


A Fine-Grained Soft Error Resilient Architecture under Power Considerations
Sajjad Hussain, Muhammad Shafique and Jörg Henkel


Fine-Grained Hardware Mitigation for Multiple Long-Duration Transients on VLIW Function Units
Rafail Psiakis, Angeliki Kritikakou and Olivier Sentieys


Adaptive Word Reordering for Low-Power Inter-Chip Communication
Eleni Maragkoudaki, Przemyslaw Mroszczyk and Vasilis F. Pavlidis


Machine-Learning-Driven Matrix Ordering for Power Grid Analysis
Ganqu Cui, Wenjian Yu, Xin Li, Zhiyu Zeng and Ben Gu


Assertion-Based Verification through Binary Instrumentation
Enzo Brignon and Laurence Pierre

Session TitleSpecial Day on "Embedded Meets Hyperscale and HPC" Panel: What can HPC and hyperscale learn from embedded computing
Session Code / Room8.1 / Room 1
Date / TimeWednesday, March 27, 2019 / 17:00 – 18:30
ChairNicole Hemsoth, The Next Platform, US


Special Day on "Embedded Meets Hyperscale and HPC" Panel: What can HPC and hyperscale learn from embedded computing

Session TitleSpecial Session: Innovative methods for verifying Systems-on-Chip: digital, mixed-signal, security and software
Session Code / Room8.2 / Room 2
Date / TimeWednesday, March 27, 2019 / 17:00 – 18:30
ChairUlf Schlichtmann, TU Munich, DE
Co-ChairGiovanni De Micheli, EPFL, CH

17:00 -17:30

Hardware and firmware verification and validation: an algorithm-to-firmware development methodology
Henry Cox and Harry H. Chen

17:30 -18:00

Processor Hardware Security Vulnerabilities and their Detection by Unique Program Execution Checking
Mohammad Rahmani Fadiheh, Dominik Stoffel, Clark Barrett, Subhasish Mitra and Wolfgang Kunz

18:00 -18:15

Symbolic QED Pre-silicon Verification for Automotive Microcontroller Cores: Industrial Case Study
Eshan Singh, Keerthikumara Devarajegowda, Sebastian Simon, Ralf Schnieder, Karthik Ganesan, Mohammad Fadiheh, Dominik Stoffel, Wolfgang Kunz, Clark Barrett, Wolfgang Ecker and Subhasish Mitra

18:15 -18:30

Review of Methodologies for Pre- and Post-Silicon Analog Verification in Mixed-Signal SOCs
Georges Gielen, Nektar Xama, Karthik Ganesan and Subhasish Mitra

Session TitleTest Preparation and Generation
Session Code / Room8.3 / Room 3
Date / TimeWednesday, March 27, 2019 / 17:00 – 18:30
ChairMatteo Sonza Reorda, Politecnico di Torino, IT
Co-ChairGrzegorz Mrugalski, Mentor, A Siemens Business, PL

17:00 -17:30

On Functional Test Generation for Deep Neural Network IPs
Bo Luo, Yu Li, Lingxiao Wei and Qiang Xu

17:30 -18:00

On Secure Data Flow in Reconfigurable Scan Networks
Pascal Raiola, Benjamin Thiemann, Jan Burchard, Ahmed Atteya, Natalia Lylina, Hans-Joachim Wunderlich, Bernd Becker and Matthias Sauer

18:00 -18:15

Resynthesis for Avoiding Undetectable Faults Based on Design-for-Manufacturability Guidelines
Naixing Wang, Irith Pomeranz, Sudhakar Reddy, Arani Sinha and Srikanth Venkataraman

18:15 -18:30

Test Pattern Generation for Approximate Circuits Based on Boolean Satisfiability
Anteneh Gebregiorgis and Mehdi B. Tahoori

Session TitleApplications of Reconfigurable Computing
Session Code / Room8.4 / Room 4
Date / TimeWednesday, March 27, 2019 / 17:00 – 18:30
ChairSuhaib Fahmy, University of Warwick, GB
Co-ChairMarco Platzner, Paderborn University, DE

17:00 -17:30

Adaptive Vehicle Detection for Real-time Autonomous Driving System
Maryam Hemmati, Morteza Biglari-Abhari and Smail Niar

17:30 -18:00

An Efficient FPGA-based Floating Random Walk Solver for Capacitance Extraction using SDAccel
Xin Wei, Changhao Yan, Hai Zhou, Dian Zhou and Xuan Zeng

18:00 -18:30

Accelerating Itemset sampling using satisfiability constraints on FPGA
Mael Gueguen, Olivier Sentieys and Alexandre Termier

Session TitleDon't Forget the Memory
Session Code / Room8.5 / Room 5
Date / TimeWednesday, March 27, 2019 / 17:00 – 18:30
ChairChristian Pilato, Politecnico di Milano, IT
Co-ChairOlivier Sentieys, INRIA, FR

17:00 -17:30

DS-Cache: A Refined Directory Entry Lookup Cache with Prefix-Awareness for Mobile Devices
Lei Han, Bin Xiao, Xuwei Dong, Zhaoyan Shen and Zili Shao

17:30 -18:00

Improving the DRAM Access Efficiency for Matrix Multiplication on Multicore Accelerators
Sheng Ma, Yang Guo, Shenggang Chen, Libo Huang and Zhiying Wang

18:00 -18:30

QBLK: Towards Fully Exploiting the Parallelism of Open-Channel SSDs
Hongwei Qin, Dan Feng, Wei Tong, Jingning Liu and Yutong Zhao

Session TitleRobotics and Industry 4.0
Session Code / Room8.6 / Room 6
Date / TimeWednesday, March 27, 2019 / 17:00 – 18:30
ChairFederica Ferraguti, University of Modena-Reggio, IT
Co-ChairArmin Schoenlieb, Infineon Technologies, AT

17:00 -17:30

A methodology for comparative analysis of collaborative robots for Industry 4.0
Federica Ferraguti, Andrea Pertosa, Cristian Secchi, Cesare Fantuzzi and Marcello Bonfè

17:30 -18:00

Hybrid Sensing Approach For Coded Modulation Time-of-Flight Cameras
Armin Schoenlieb, Hannes Plank, Christian Steger, Gerald Holweg and Norbert Druml

18:00 -18:15

Communication-Computation co-Design of Decentralized Task Chain in CPS Applications
Seyyed Ahmad razavi, Eli Bozorgzadeh and Solmaz S. Kia

18:15 -18:30

Resource Manager for Scalable Performance in ROS Distributed Environments
Daisuke Fukutomi, Takuya Azumi, Shinpei Kato and Nobuhiko Nishio

Session TitleEmbedded hardware architectures for deep neural networks
Session Code / Room8.7 / Room 7
Date / TimeWednesday, March 27, 2019 / 17:00 – 18:30
ChairSandeep Pande, IMEC-NL, NL
Co-ChairKyuho Lee, Ulsan National Institute of Science and Technology (UNIST), KR

17:00 -17:30

Self-Supervised Quantization of Pre-Trained Neural Networks for Multiplierless Acceleration
Sebastian Vogel, Jannik Springer, Andre Guntoro and Gerd Ascheid

17:30 -18:00

Multi-objective Precision Optimization of Deep Neural Networks for Edge Devices
Nhut-Minh Ho, Ramesh Vaddi and Weng-Fai Wong

18:00 -18:15

Towards Design Space Exploration and Optimization of Fast Algorithms for Convolutional Neural Networks (CNNs) on FPGAs
Afzal Ahmad and Muhammad Adeel Pasha

18:15 -18:30

Accelerating Local Binary Pattern Networks with Software-Programmable FPGAs
Jeng-Hau Lin, Atieh Lotfi, Vahideh Akhlaghi, Zhuowen Tu and Rajesh K. Gupta

Session TitleInspiring futures! Careers Session @ DATE (part 2)
Session Code / Room8.8 / Exhibition Theatre
Date / TimeWednesday, March 27, 2019 / 17:00 – 18:30
ChairLuca Fanucci, University of Pisa, IT

17:00 -17:15

Eluisa Ghilardi

17:15 -17:30

Jan Andersson

17:30 -17:45

Camila Giunti

17:45 -18:30


Session TitleSpecial Day on "Model-Based Design of Intelligent Systems" Session: Experiences from the trenches, model-based design at work
Session Code / Room9.1 / Room 1
Date / Time Thursday, March 28, 2019 / 08:30 – 10:00
ChairIngo Sander, KTH, SE
Co-ChairSander Stuijk, Eindhoven University of Technology, NL


Model based Design at THALES: the Current status and New Challenges
Laurent Rioux


Model-based Design for Controls, ai, and Communications in Intelligent Systems
Pieter Mosterman


Model Driven Development of Twinscan Software, but not from Scratch!
Ramon Schiffelers

Session TitleHigh-Level Synthesis
Session Code / Room9.2 / Room 2
Date / Time Thursday, March 28, 2019 / 08:30 – 10:00
ChairYuko Hara-Azumi, Tokyo Institute of Technology, JP
Co-ChairJordi Cortadella, UPC, ES

8:30 -9:00

Transient Key-based Obfuscation for HLS in an Untrusted Cloud Environment
Hannah Badier, Jean-Christophe Le Lann, Philippe Coussy and Guy Gogniat

9:00 -9:30

High-Level Synthesis of Benevolent Trojans
Christian Pilato, Kanad Basu, Mohammed Shayan, Francesco Regazzoni and Ramesh Karri

9:30 -10:00

Machine Learning Based Routing Congestion Prediction in FPGA High-Level Synthesis
Jieru Zhao, Tingyuan Liang, Sharad Sinha and Wei Zhang

Session TitleSpecial Session: RISC-V or RISK-V? Towards Secure Open Hardware
Session Code / Room9.3 / Room 3
Date / Time Thursday, March 28, 2019 / 08:30 – 10:00
ChairGeorg Sigl, TU Munich, DE

8:30 -9:00

Protecting RISC-V Processors against Physical Side Channel Attacks
Thomas Unterluggauer, Robert Schilling, Mario Werner and Stefan Mangard

9:00 -9:30

Sanctorum: A lightweight security monitor for secure enclaves
Ilia Lebedev, Kyle Hogan, Jules Drean, David Kohlbrenner, Dayeol Lee, Krste Asanović, Dawn Song and Srinivas Devadas

9:30 -9:45

Towards Reliable and Secure Post-Quantum Co-Processor based on RISC-V
Tim Fritzmann, Uzair Sharif, Daniel Mueller-Gritschneder, Cezar Rodolfo Wedig Reinbrecht, Ulf Schlichtmann and Johanna Sepulveda

9:45 -10:00

A Security Architecture for RISC-V based IoT Devices
Lukas Auer, Christian Skubich and Matthias Hiller

Session TitleWhere do NoC and Machine Learning meet?
Session Code / Room9.4 / Room 4
Date / Time Thursday, March 28, 2019 / 08:30 – 10:00
ChairMasoud Daneshtalab, Mälardalen University, SE
Co-ChairSébastien Le Beux, Lyon Institute of Nanotechnology, FR

8:30 -9:00

Real-time Detection and Localization of DoS Attacks in NoC based SoCs
Subodha Charles, Yangdi Lyu and Prabhat Mishra

9:00 -9:30

High-performance, Energy-efficient, Fault-tolerant Network-on-Chip Design Using Reinforcement Learning
Ke Wang, Ahmed Louri, Avinash Karanth and Razvan Bunescu

9:30 -9:45

Learn-to-Scale: Parallelizing Deep Learning Inference on Chip Multiprocessor Architecture
Kaiwei Zou, Ying Wang, Huawei Li and Xiaowei Li

9:45 -10:00

Advance Virtual Channel Reservation
Boqian Wang and Zhonghai Lu

SessionAttacking Memory and I/O Bottlenecks
Session Code / Room9.5/ Room 5
Date / Time Thursday, March 28, 2019 / 08:30 - 10:00
ChairLeonidas Kosmidis, Barcelona Supercomputing Center, ES
Co-ChairCristina Silvano, Politecnico di Milano, IT

8:30 -9:00

SLC: Memory Access Granularity Aware Selective Lossy Compression for GPUs
Sohan Lal, Jan Lucas and Ben Juurlink

9:00 -9:30

LoSCache: Leveraging Locality Similarity to Build Energy-Efficient GPU L2 Cache
Jingweijia Tan, Kaige Yan, Shuaiwen Leon Song and Xin Fu

9:30 -10:00

LBICA: A Load Balancer for I/O Cache Architectures
Saba Ahmadian, Reza Salkhordeh and Hossein Asadi

SessionReliability of highly-parallel architectures: an industrial perspective
Session Code / Room9.6/ Room 6
Date / Time Thursday, March 28, 2019 / 08:30 - 10:00
ChairDoris Keitel-Schulz, Infineon Technologies, DE
Co-ChairFabien Clermidy, CEA, FR

8:30 -9:00

AURIX TC277 Multicore Contention Model Integration for Automotive Applications
Enrico Mezzetti, Luca Barbina, Jaume Abella, Stefania Botta and Francisco Cazorla

9:00 -9:30

Seamless SoC Verification Using Virtual Platforms: An Industrial Case Study
Kyungsu Kang, Sangho Park, Byeongwook Bae, Jungyun Choi, SungGil Lee, Byunghoon Lee and Jong-Bae Lee

9:30 -9:45

Multicore Early Design Stage Guaranteed Performance Estimates for the Space Domain
Mikel Fernandez, Gabriel Fernandez, Jaume Abella, Francisco Cazorla and Francisco Cazorla

9:45 -10:00

Polar Code Decoder Framework
Timo Lehnigk-Emden, Matthias Alles, Claus Kestel and Norbert Wehn

SessionRuntime Predictability
Session Code / Room9.7/ Room 7
Date / Time Thursday, March 28, 2019 / 08:30 - 10:00
ChairRolf Ernst, TU Braunschweig, DE
Co-ChairGerhard Fohler, University of Kaiserslautern, DE

8:30 -9:00

Increasing Accuracy of Timing Models: From CPA to CPA+
Leonie Köhler, Borislav Nikolic, Marc Boyer and Rolf Ernst

9:00 -9:30

Scratchpad Memories with Ownership
Martin Schoeberl, Tórur Biskopstø Strøm, Oktay Baris and Jens Sparsø

9:30 -9:45

A Container-based DoS Attack-Resilient Control Framework for Real-Time UAV Systems
Jiyang Chen, Zhiwei Feng, Jen-Yang Wen, Bo Liu and Lui Sha

9:45 -10:00

An Exact Schedulability Test for Non-Preemptive Self-Suspending Real-Time Tasks
Beyazit Yalcinkaya, Mitra Nasri and Björn Brandenburg

SessionSpecial Session: IBM's Qiskit Tool Chain: Developing for and Working with Real Quantum Computers
Session Code / Room9.8/ Exh. Theatre
Date / Time Thursday, March 28, 2019 / 08:30 - 10:00
ChairRobert Wille, Johannes Kepler University Linz, AT


Qiskit: An overview of the Open-source Framework for Quantum Computing
Yehuda Naveh


Developing for Qiskit: Introducing EDA methods into the Toolkit
Robert Wille


Using Qiskit: NISQ-ERA compilation for Qiskit
Rod Van Meter

Session Title Interactive Presentations
Session Code / RoomIP4 / Poster Area
Date / Time Thursday, March 22, 2019 / 10:00 – 10:30


An Efficient Mapping Approach to Large-Scale DNNs on Multi-FPGA Architectures
Wentai Zhang, Jiaxi Zhang, Minghua Shen, Guojie Luo and Nong Xiao


A Write-Efficient Cache Algorithm based on Macroscopic Trend for NVM-based Read Cache
Ning Bao, Yunpeng Chai and Xiao Qin


SRAM Design Exploration with Integrated Application-Aware Aging Analysis
Alexandra Listl, Daniel Mueller-Gritschneder, Sani Nassif and Ulf Schlichtmann


From Multi-Level to Abstract-based Simulation of a Production Line
Stefano Centomo, Enrico Fraccaroli and Marco Panato


Accurate Dynamic Modelling of Hydraulic Servomechanisms
Manuel Pencelli, Renzo Villa, Alfredo Argiolas, Gianni Ferretti, Marta Niccolini, Matteo Ragaglia, Paolo Rocco and Andrea Maria Zanchettin


Planning with Real-Time Collision Avoidance for Cooperating Agents under Rigid Body Constraint
Nicola Piccinelli, Federico Vesentini and Riccardo Muradore


The Case for Exploiting Underutilized Resources in Heterogeneous Mobile Architectures
Chenying Hsieh, Nikil Dutt and Ardalan Amiri Sani


Online Rare Category Detection for Edge Computing
Yufei Cui, Qiao Li, Sarana Nutanong and Chun Jason Xue


RAGra: Leveraging Monolithic 3D ReRAM for Massively-Parallel Graph Processing
Yu Huang, Long Zheng, Xiaofei Liao, Hai Jin, Pengcheng Yao and Chuangyi Gui


Accurate Cost Estimation of Memory Systems Inspired by Machine Learning for Computer Vision
Lorenzo Servadei, Elena Zennaro, Keerthikumara Devarajegowda, Martin Manzinger, Wolfgang Ecker and Robert Wille


Practical Causality Handling for Synchronous Languages
Steven Smyth, Alexander Schulz-Rosengarten and Reinhard von Hanxleden


Application Performance Prediction and Optimization Under Cache Allocation Technology
Yeseong Kim, Ankit More, Emily Shriver and Tajana Rosing


Generalized Matrix Factorization Techniques for Approximate Logic Synthesis
Soheil Hashemi and Sherief Reda


CARS: A Multi-layer Conflict-Aware Request Scheduler for NVMe SSDs
Tianming Yang, Ping Huang, Weiying Zhang, Haitao Wu and Longxin Lin


Queue Based Memory Management Unit for Heterogeneous MPSoCs
Robert Wittig, Mattis Hasler, Emil Matus and Gerhard Fettweis

Session TitleSpecial Day on "Model-Based Design of Intelligent Systems" Session: Hot topic: Model-Based Machine Learning
Session Code / Room10.1 / Room 1
Date / Time Thursday, March 28, 2019 / 11:00 – 12:30
ChairAndreas Gerstlauer, University of Texas at Austin, US
Co-ChairPatricia Derler, National Instruments, US

11:00 -11:30

Embedded Systems' Automation following OMG's Model Driven Architecture Vision
Wolfgang Ecker, Keerthikumara Devarajegowda, Michael Werner, Zhao Han and Lorenzo Servadei

11:30 -12:00

Formal Computation Models in Neuromorphic Computing: Challenges and Opportunities
Orlando Moreira

12:00 -12:30

Automated Signal Processing Design through Bayesian model-based Machine Learning
Bert de Vries

Session TitleSpecial Session: Enabling Graph Analytics at Extreme Scales: Design Challenges, Advances, and Opportunities
Session Code / Room10.2 / Room 2
Date / Time Thursday, March 28, 2019 / 11:00 – 12:30
ChairPartha Pande, Washington State University, US

11:00 -11:30

A Brief Survey of Algorithms, Architectures, and Challenges toward Extreme-scale Graph Analytics
Ananth Kalyanaraman and Partha Pratim Pande

11:30 -12:00

A Parallel Graph Environment for Real-World DataAnalytics Workflows
Vito Giovanni Castellana, Maurizio Drocco, John Feo, Andrew Lumsdaine, Joseph Manzano, Andres Marquez, Marco Minutoli, Joshua Suetterlein, Antonino Tumeo and Marcin Zalewski

12:00 -12:15

Scaling up Network Centrality Computations
Henning Meyerhenke and Alexander van der Grinten

Session TitleSystem-level Dependability for Multicore and Real-time Systems
Session Code / Room10.3 / Room 3
Date / Time Thursday, March 28, 2019 / 11:00 – 12:30
ChairStefano Di Carlo, Politecnico di Torino, IT
Co-ChairLuca Cassano, Politecnico di Milano, IT

11:00 -11:30

Identifying the Most Reliable Collaborative Workload Distribution in Heterogeneous Devices
Gabriel Piscoya Dávila, Daniel Oliveira, Philippe Navaux and Paolo Rech

11:30 -12:00

CE-Based Optimization for Real-time System Availability under Learned Soft Error Rate
Liying Li, Tongquan Wei, Junlong Zhou, Mingsong Chen and X, Sharon Hu

12:00 -12:30

A Deterministic-Path Routing Algorithm for Tolerating Many Faults on Wafer-Level NoC
Zhongsheng Chen, ying zhang, Zebo Peng and Jianhui Jiang

Session TitleDisruptive Technologies Ain't Fake News!
Session Code / Room10.4 / Room 4
Date / Time Thursday, March 28, 2019 / 11:00 – 12:30
ChairElena Gnani, University of Bologna, IT
Co-ChairAida Todri-Sanial, CNRS-LIRMM, FR

11:00 -11:30

CoDAPT: A Concurrent Data And Power Transceiver for Fully Wireless 3D-ICs
Benjamin Fletcher, Shidhartha Das and Terrence Mak

11:30 -12:00

Compiling permutations for superconducting QPUs
Mathias Soeken, Fereshte Mozafari, Bruno Schmitt and Giovanni De Micheli

12:00 -12:15

Stochastic Computing with Integrated Optics
Hassnaa El-Derhalli, Sébastien Le Beux and Sofiene Tahar

12:15 -12:30

Inkjet-Printed True Random Number Generator based on Additive Resistor Tuning
Ahmet Turan Erozan, Rajendra Bishnoi, Jasmin Aghassi-Hagmann and Mehdi Tahoori

Session TitleSSD and data placement
Session Code / Room10.5 / Room 5
Date / Time Thursday, March 28, 2019/ 11:00 – 12:30
ChairOlivier Sentieys, INRIA, FR
Co-ChairHamid Tabani, Barcelona Supercomputing Center, BSC, ES

11:00 -11:30

HotR: Alleviating Read/Write Interference with Hot Read Data Replication for Flash Storage
Suzhen Wu, Weiwei Zhang, Bo Mao and Hong Jiang

11:30 -12:00

RAFS: A RAID-Aware File System to Reduce the Parity Update Overhead for SSD RAID
Chenlei Tang, Jiguang Wan, Yifeng Zhu, Zhiyuan Liu, Peng Xu, Fei Wu and Changsheng Xie

12:00 -12:30

Automatic data placement for CPU-FPGA heterogeneous multiprocessor system-on-chips
Shiqing Li, Yixun Wei and Lei Ju

Session TitleSelf-adaptive resource management
Session Code / Room10.6 / Room 6
Date / Time Thursday, March 28, 2019 / 11:00 – 12:30
ChairGeoff Merret, University of Southampton, UK
Co-ChairAndy Pimantel, University of Amsterdam, NL

11:00 -11:30

A Runtime Resource Management Policy for OpenCL Workloads on Heterogeneous Multicores
Daniele Angioletti, Francesco Bertani, Cristiana Bolchini, Francesco Cerizzi and Antonio Miele

11:30 -12:00

DMRM: Distributed Market-Based Resource Management of Edge Computing Systems
Manolis Katsaragakis, Dimosthenis Masouros, Vasileios Tsoutsouras, Farzad Samie, Lars Bauer, Joerg Henkel and Dimitrios Soudris

12:00 -12:15

Goal-Driven Autonomy for Efficient On-chip Resource Management: Translating Objectives to Goals
Elham shamsa, Anil Kanduri, Amir M. Rahmani, Pasi Liljeberg, Axel Jantsch and Nikil Dutt

12:15 -12:30

Scrub Unleveling: Achieving High Data Reliability at Low Scrubbing Cost
Tianming Jiang, Ping Huang and Ke Zhou

Session TitleArchitectures for emerging machine learning techniques
Session Code / Room10.7 / Room 7
Date / Time Thursday, March 28, 2019 / 11:00 – 12:30
ChairSander Stuijk, Eindhoven University of Technology, NL
Co-ChairMarina Zapater, EPFL, CH

11:00 -11:30

Learning to infer: RL-based search for DNN primitive selection on Heterogeneous Embedded Systems
Miguel de Prado, Nuria Pazos and Luca Benini

11:30 -12:00

Memory Trojan Attack on Neural Network Accelerators
Yang Zhao, Xing Hu, Shuangchen Li, Jing Ye, Lei Deng, Yu Ji, Jianyu Xu, Dong Wu and Yuan Xie

12:00 -12:15

Deep Positron: A Deep Neural Network Using the Posit Number System
Zachariah Carmichael, Hamed F. Langroudi, Char Khazanov, Jeffrey Lillie, John L. Gustafson and Dhireesha Kudithipudi

12:15 -12:30

Learning to Skip Ineffectual Recurrent Computations in LSTMs
Arash Ardakani, Zhengyun Ji and Warren Gross

Session TitleEurope digitization: Smart Anything Everywhere Initiative & FED4SAE, open calls and success stories
Session Code / Room10.8 / Exhibition Theatre
Date / Time Thursday, March 28, 2019 / 11:00 – 12:30
ChairMarcello Coppola, STMicroelectronics, FR

11:00 -11:15

SAE, An example of EC Inititiave to support Europe Digitization
Isabelle Dor

11:15 -11:30

SME, RTO, Industrial: How SAE support the Collaboration - Part 1
Marcello Coppola

11:30 -11:45

SME, RTO, Industrial: How SAE support the Collaboration - Part 2
Michael Setton

11:45 -12:00

SME, RTO, Industrial: How SAE support the Collaboration - Part 3
Rosanna Zaza

12:00 -12:30

SME, RTO, Industrial: How SAE support the Collaboration - Part 4
Giovanni Gherardi

Session Code / Room11.0 / Room 1
Date / Time Thursday, March 28, 2019 / 13:20 – 13:50
ChairMarc Geilen, Eindhoven University of Technology, NL
ChairSander Stuijk, Eindhoven University of Technology, NL

13:20 – 13:50

Keynote Address 5: A Fundamental look at Models and Intelligence
Edward Lee

Session TitleSpecial Day on "Model-Based Design of Intelligent Systems" Session: MBD of Cyber-Physical Systems
Session Code / Room11.1 / Room 1
Date / Time Thursday, March 28, 2019 / 14:00 – 15:30
ChairEugenio Villar, Universidad de Cantabria, ES
Co-ChairMarc Geilen, Eindhoven University of Technology, NL

14:00 -14:30

Specifying and Evaluating Quality Metrics for Vision-based Perception Systems
Adel Dokhanchi, Aniruddh Puranic, Xin Qin, Anand Balakrishnan, Heni Ben Amor, Georgios Fainekos and Jyotirmoy V. Deshmukh

14:30 -15:00

Modeling Cross-Layer Interactions for Designing Certifiable Cyber-Physical Systems
Samarjit Chakraborty, James H. Anderson, Martin Becker, Helmut Graeb, Samiran Halder, Ravindra Metta, Lothar Thiele, Stavros Tripakis and Anand Yeolekar

15:00 -15:30

Towards verified programming of embedded devices
Jean-Pierre Talpin, Jean-Joseph Marty, Shravan Narayan, Deian Stefan and Rajesh Gupta

Session TitleNovel techniques in optimization and high-level modeling of mixed-signal circuits
Session Code / Room11.2 / Room 2
Date / Time Thursday, March 28, 2019 / 14:00 – 15:30
ChairFrancisco V. Fernandez, IMSE, ES
Co-ChairMark Po-Hung Lin, National Chung Cheng University, TW

14:00 -14:30

Behavioral Modeling of Transistor-Level Circuits using Automatic Abstraction to Hybrid Automata
Ahmad Tarraf and Lars Hedrich

14:30 -15:00

Nubolic Simulation of AMS Systems with Data Flow and Discrete Event Models
Carna Zivkovic and Christoph Grimm

15:00 -15:30

Bayesian Optimization Approach for Analog Circuit Synthesis Using Neural Network
Shuhan Zhang, Wenlong Lv, Fan Yang, Changhao Yan, Dian Zhou and Xuan Zeng

Session TitleSpecial Session: Rebooting our Computing Models
Session Code / Room11.3 / Room 3
Date / Time Thursday, March 28, 2019 / 14:00 – 15:30
ChairPierre-Emmanuel Gaillardon, University of Utah, US
Co-ChairIan O'Connor, Ecole Centrale of Lyon, FR


From Qubit to Computer
Koen Bertels and Carmen G. Almudever


Intrinsic Computing using Weakly Coupled Oscillators
Nagadastagiri Reddy


The Memcomputing Paradigm
Massimiliano Di Ventra

Session TitleLearning Gets Smarter
Session Code / Room11.4 / Room 4
Date / Time Thursday, March 28, 2019 / 14:00 – 15:30
ChairYuanqing Cheng, Beihang University, CN
Co-ChairMariagrazia Graziano, Politecnico di Torino, IT

14:00 -14:30

NeuADC: Neural Network-Inspired RRAM-Based Synthesizable Analog-to-Digital Conversion with Reconfigurable Quantization Support
Weidong Cao, Xin He, Ayan Chakrabarti and Xuan Zhang

14:30 -15:00

Holylight: A Nanophotonic Accelerator for Deep Learning in Data Centers
Weichen Liu, Wenyang Liu, Yichen Ye, Qian Lou, Yiyuan Xie and Lei Jiang

15:00 -15:15

Transfer and Online Reinforcement Learning in STT-MRAM Based Embedded Systems for Autonomous Drones
Insik Yoon, Aqeel Anwar, Titash Rakshit and Arijit Raychowdhury

15:15 -15:30

AIX: A high performance and energy efficient inference accelerator on FPGA for a DNN-based commercial speech recognition
Minwook Ahn, Seok Joong Hwang, Wonsub Kim, Seungrok Jung, Yeonbok Lee, Mookyoung Chung, Woohyung Lim and Youngjoon Kim

Session TitleVitello e Mozzarella alla Fiorentina: Virtualization, Multicore, and Fault-Tolerance
Session Code / Room11.5 / Room 5
Date / Time Thursday, March 28, 2019 / 14:00 – 15:30
ChairPhilippe Coussy, Universite de Bretagne-Sud / Lab-STICC, FR
Co-ChairMichael Glass, Ulm University, DE

14:00 -14:30

VM-aware Flush Mechanism for Mitigating Inter-VM I/O Interference
Taehyung Lee, Minho Lee and Young Ik Eom

14:30 -15:00

An Efficient Bit-Flip Resilience Optimization Method for Deep Neural Networks
Christoph Schorn, Andre Guntoro and Gerd Ascheid

15:00 -15:30

Approximation-aware Task Deployment on Asymmetric Multicore Processors
Lei Mo, Angeliki Kritikakou and Olivier Sentieys

Session TitleDesign Automation Solutions for Microfluidic Platforms and Tasks
Session Code / Room11.6 / Room 6
Date / Time Thursday, March 28, 2019 / 14:00 – 15:30
ChairRobert Wille, Johannes Kepler University Linz, AT
Co-ChairAndy Tyrrell, University of York, UK

14:00 -14:30

BioScan: Parameter-Space Exploration of Synthetic Biocircuits Using MEDA Biochips
Mohamed Ibrahim, Bhargab Bhattacharya and Krishnendu Chakrabarty

14:30 -15:00

Physical Synthesis of Flow-Based Microfluidic Biochips Considering Distributed Channel Storage
Zhisheng Chen, Xing Huang, Wenzhong Guo, Bing Li, Tsung-Yi Ho and Ulf Schlichtmann

15:00 -15:30

Block-Flushing: A Block-based Washing Algorithm for Programmable Microfluidic Devices
Yu-Huei Lin, Tsung-Yi Ho, Bing Li and Ulf Schlichtmann

Session TitleExtending Scheduling Schemes
Session Code / Room11.7 / Room 7
Date / Time Thursday, March 28, 2019 / 14:00 – 15:30
ChairMarco Di Natale, Scuola Superiore Sant'Anna of Pisa, IT
Co-ChairMitra Nasri, TU Delft, NL

14:00 -14:30

Analyzing GEDF Scheduling for Parallel Real-Time Tasks with Arbitrary Deadlines
Xu Jiang, Nan Guan, Di Liu and Weichen Liu

14:30 -15:00

Simple and General Methods for Fixed-Priority Schedulability in Optimization Problems
Paolo Pazzaglia, Alessandro Biondi and Marco Di Natale

15:00 -15:30

Hard Real-Time Scheduling of Streaming Applications Modeled as Cyclic CSDF Graphs
Sobhan Niknam, Peng Wang and Todor Stefanov

Session TitleAn Industry Approach to FPGA/ARM System Development and Verification (part 1)
Session Code / Room11.8 / Exhibition Theatre
Date / Time Thursday, March 28, 2019 / 14:00 – 15:30
ChairMarco Di Natale, Scuola Superiore Sant'Anna of Pisa, IT
Co-ChairMitra Nasri, TU Delft, NL

14:00 -14:30

An industry approach to FPGA/ARM system development and verification (part 1)
John Zhao

Session Title Interactive Presentations
Session Code / RoomIP5 / Poster Area
Date / TimeThursday, March 28, 2019 / 15:30 – 16:00


Thermal-Awareness in a Soft Error Tolerant Architecture
Sajjad Hussain, Muhammad Shafique and Joerg Henkel


A software-level Redundant MultiThreading for Soft/Hard Error Detection and Recovery
Moslem Didehban, HwiSoo So, Aviral Shrivastava and Kyoungwoo Lee


Common-Mode Failure Mitigation:Increasing Diversity through High-Level Synthesis
Farah Naz Taher, Matthew Joslin, Anjana Balachandran, Zhiqi Zhu and Benjamin Carrion Schaefer


Exploiting Wavelength Division Multiplexing for Optical Logic Synthesis
Zheng Zhao, Derong Liu, Zhoufeng Ying, Biying Xu, Chenghao Feng, Ray T. Chen and David Z. Pan


IgnoreTM: Opportunistically Ignoring Timing Violations for Energy Savings using HTM
Dimitra Papagiannopoulou, Sungseob Whang, Tali Moreshet and Iris Bahar


Using Machine Learning for Quality Configurable Approximate Computing
Mahmoud Masadeh, Osman Hasan and Sofiene Tahar


Prediction-Based Task Migration on S-NUCA Many-Cores
Martin Rapp, Anuj Pathania, Tulika Mitra, Joerg Henkel, Lars Bauer, Joerg Henkel and Dimitrios Soudris


Design of Hardware-Friendly Memory Enhanced Neural Networks
Ann Franchesca Laguna, Michael Niemier and X, Sharon Hu


Energy-Efficient Inference Accelerator for Memory-Augmented Neural Networks on an FPGA
Seongsik Park, Jaehee Jang, Seijoon Kim and Sungroh Yoon


HDCluster: An Accurate Clustering Using Brain-Inspired High-Dimensional Computing
Mohsen Imani, Yeseong Kim, thomas Worley, Saransh Gupta and Tajana Rosing


Finding All DC Operating Points Using Interval-Arithmetic Based Verification Algorithms
Itrat Akhter, Justin Reiher and Mark Greenstreet


GENIE: QoS-guided Dynamic Scheduling for CNN-based Tasks on SME Clusters
Zhaoyun Chen, Lei Luo, Haoduo Yang, Jie Yu, Mei Wen and Chunyuan Zhang


Adiabatic Implementation of Manchester Encoding for Passive NFC System
Sachin Maheshwari and Izzet Kale


A Pulse Width Modulation based Power-elastic and Robust Mixed-signal Perceptron Design
Sergey Mileiko, Rishad Shafik, Alex Yakovlev and Jonathan Edwards


Fault Localization in Programmable Microfluidic Devices
Alessandro Bernardini, Chunfeng Liu, Bing Li and Ulf Schlichtmann


Thermal Sensing Using Micro-ring Resonators in Optical Network-on-Chip
Weichen Liu, Mengquan Li, Wanli Chang, Chunhua Xiao, Yiyuan Xie, Nan Guan and Lei Jiang

Session TitleSpecial Day on "Model-Based Design of Intelligent Systems" Session: MBD of Safe and Secure Systems
Session Code / Room12.1 / Room 1
Date / Time Thursday, March 28, 2019 / 16:00 – 17:30
ChairFrédéric Mallet, Université Nice Sophia Antipolis, FR
Co-ChairMarc Geilen, Eindhoven University of Technology, NL

16:00 -16:30

Semantic Integration Platform for Cyber-Physical System Design
Qishen Zhang, Ted Bapty, Tamas Kecskes and Janos Sztipanovits

16:30 -17:00

Worst-Case Cause-Effect Reaction Latency in Systems with Non-Blocking Communication
Jakaria Abdullah, Gaoyang Dai and Yi Wang

17:00 -17:30

Harmonizing Safety, Security and Performance Requirements in Embedded Systems
Ludovic Apvrille and Letitia Li

Session TitleThe Art of Synthesizing Logic
Session Code / Room12.2 / Room 2
Date / Time Thursday, March 28, 2019 / 16:00 – 17:30
ChairJordi Cortadella, University Politecnica de Catalunya, ES
Co-ChairTiziano Villa, University of Verona, IT

16:00 -16:30

A Satisfiability-Based Approximate Algorithm for Logic Synthesis Using Switching Lattices
Levent Aksoy and Mustafa Altun

16:30 -17:00

Scalable Boolean Methods in a Modern Synthesis Flow
Eleonora Testa, Luca Amaru, Mathias Soeken, Alan Mishchenko, Patrick Vuillod, Jiong Luo, Christopher Casares, Pierre-Emmanuel Gaillardon and Giovanni De Micheli

17:00 -17:15

On-the-fly and DAG-aware: Rewriting Boolean Networks with Exact Synthesis
Heinz Riener, Winston Haaswijk, Alan Mishchenko, Giovanni De Micheli and Mathias Soeken

17:15 -17:30

Approximate Logic Synthesis by Symmetrization
Anna Bernasconi, Valentina Ciriani and Tiziano Villa

Session TitleAging, calibration circuits and yield
Session Code / Room12.3 / Room 3
Date / Time Thursday, March 28, 2019 / 16:00 – 17:30
ChairHank Walker, TAMU, US
Co-ChairNaghmeh Karimi, University of Maryland Baltimore county, US

16:00 -16:30

Package and Chip Accelerated Aging Tests for Power MOSFET Reliability Evaluation
Tingyou Lin, Chauchin Su, Chung-Chih Hung, Karuna Nidhi, Chily Tu and Shao-Chang Huang

16:30 -17:00

Bayesian Optimized Importance Sampling for High Sigma Failure Rate Estimation
Dennis Weller, Michael Hefenbrock, Mohammad Saber Golanbari, Michael Beigl and Mehdi Tahoori

17:00 -17:15

Wafer-Level Adaptive Vmin Calibration Seed Forecasting
Constantinos Xanthopoulos, Deepika Neethirajan, Sirish Boddikurapati, Amit Nahar and Yiorgos Makris

17:15 -17:30

Single-event double-upset self-recoverable and single-event transient pulse filterable latch design for low power applications
Aibin Yan, Yuanjie Hu, Jie Song and Xiaoqing Wen

Session TitleDesign and Optimization for Low-Power Applications
Session Code / Room12.4 / Room 4
Date / Time Thursday, March 28, 2019 / 16:00 – 17:30
ChairAlberto Nannarelli, DTU, DK
Co-ChairPaolo Amato, Micron, IT

16:00 -16:30

Dynamic Scheduling on Heterogeneous Multicores
Ayobami Edun, Ruben Vazquez, Ann Gordon-Ross and Greg Stitt

16:30 -17:00

Selecting the Optimal Energy Point in Near-Threshold Computing
sami salamin, Hussam Amrouch and Joerg Henkel

17:00 -17:15

Exploration and Design of Low-Energy Logic Cells for 1 kHz Always-on Systems
Maxime Feyerick, Jaro De Roose and Marian Verhelst

17:15 -17:30

Enabling Energy-Efficient Unsupervised Monocular Depth Estimation on ARMv7-Based Platforms
Valentino Peluso, Antonio Cipolletta, Andrea Calimera, Matteo Poggi, Fabio Tosi and Stefano Mattoccia

Session TitleSystem Modelling for Analysis and Simulation
Session Code / Room12.5 / Room 5
Date / Time Thursday, March 22, 2019 / 16:00 – 17:30
ChairIngo Sander, Ingo, SE
Co-ChairGianluca Palermo, Politecnico di Milano, IT

16:00 -16:30

RDF: Reconfigurable Dataflow
Pascal Fradet, Alain Girault, Ruby Krishnaswamy, Xavier Nicollin and Arash Shafiei

16:30 -17:00

Probabilistic State-Based RT-Analysis of SDFGs on MPSoCs with Shared Memory Communication
Ralf Stemmer, Henning Schlender, Maher Fakih, Kim Grüttner and Wolfgang Nebel

17:00 -17:30

Speculative Temporal Decoupling Using fork()
Matthias Jung, Frank Schnicke, Markus Damm, thomas kuhn and Norbert Wehn

Session TitleTrojans and public key implementation challenges
Session Code / Room12.6 / Room 6
Date / TimeThursday, March 28, 2019 / 16:00 – 17:50
ChairPatrick Schaumont, Virginia Tech, US
Co-ChairNele Mentens, KU Leuven, BE

16:00 -16:30

When Capacitors Attack: Formal Method Driven Design and Detection of Charge-Domain Trojans
Xiaolong Guo, Huifeng Zhu, Yier Jin and Xuan Zhang

16:30 -17:00

Fourℚ on ASIC: Breaking Speed Records for Elliptic Curve Scalar Multiplication
Hiromitsu Awano and Makoto Ikeda

17:00 -17:15

DArL: Dynamic Parameter Adjustment for LWE-based Secure Inference
Song Bian, Masayuki Hiromoto and Takashi Sato

17:15 -17:30

Timing Violation Induced Faults in Multi-Tenant FPGAs
Dina Mahmoud and Mirjana Stojilovic

Session TitleEmerging Strategies for Deep Neural Network Hardware
Session Code / Room12.7 / Room 7
Date / TimeThursday, March 28, 2019 / 16:00 – 17:30
ChairJim Harkin, University of Ulster, UK
Co-ChairLi Jiang, Institute: Shanghai Jiao Tong University, CN

16:00 -16:30

Aging-aware Lifetime Enhancement for Memristor-based Neuromorphic Computing
Shuhang Zhang, Grace Li Zhang, Bing Li, Hai (Helen) Li, Ulf Schlichtmann and Krishnendu Chakrabarty

16:30 -17:00

Energy-Efficient Convolutional Neural Networks with Deterministic Bit-Stream Processing
Sayed Abdolrasoul Faraji, M. Hassan Najafi, Bingzhe Li, Kia Bazargan and David Lilja

17:00 -17:15

RED: A ReRAM-based Deconvolution Accelerator
Zichen Fan, Ziru Li, Bing Li, Yiran Chen and Hai (Helen) Li

17:15 -17:30

Design of Reliable DNN Accelerator with Un-reliable ReRAM
Yun Long and Saibal Mukhopadhyay

Session TitleAn Industry Approach to FPGA/ARM System Development and Verification (part 2)
Session Code / Room12.8 / Exhibition Theatre
Date / TimeThursday, March 28, 2019 / 16:00 – 17:30
OrganiserJohn Zhao, MathWorks, US

16:00 -16:30

An Industry Approach to FPGA/ARM System Development and Verification (Part 2)
John Zhao