Dual-gate self-aligned a-InGaZnO transistor model for flexible circuit applications
Florian De Roose1,a, Hikmet Çeliker1, Jan Genoe1, Wim Dehaene2 and Kris Myny3
1imec, large area electronics KU Leuven, ESAT department Leuven, Belgium
2KU Leuven, MICAS department imec, large area electronics Leuven, Belgium
3imec, large area electronics Leuven, Belgium
aflorian.deroose@imec.be
ABSTRACT
This work elaborates on an amorphous Indium-Gallium-Zinc Oxide thin-film transistor model for a dual-gate self-aligned transistor configuration, enabling the design and realization of complex integrated circuits. The model originates from a mobility-enhanced transistor behavior model, whereby the additional backgate impacts key parameters, such as threshold voltage, mobility and subthreshold slope. The model has been validated for the full design flow and compared to measurement results, from single transistors, to inverters, ring oscillators and RFID transponder chips.
Keywords: InGaZnO, mobility-enhancement, dual-gate, modeling, integrated circuits, RFID transponder chips
