Library Design and Design tools for Adiabatic Quantum-flux-parametron Logic Circuits (AC-biased SFQ Logic)
Nobuyuki Yoshikawa
Yokohama National University, JP
ABSTRACT
Adiabatic quantum-flux-parametron (AQFP) logic is one of the superconducting logic families. Its attractive feature is the extremely high-energy efficiency due to the adiabatic operation of superconducting circuits that can intrinsically switch at very high speed. The bit energy of the AQFP logic is as small as 1 zJ (10-21 J) per gate even at 5 GHz or higher clock frequencies thanks to the logic operation near the quantum and thermal limit. The fundamental logic element of the AQFP logic is majority gates, which are driven by sinusoidal power clocks of multi-phases, typically four phases. The gate-to-gate connections are made by inductances with limited length. These unique features of the AQFP logic circuits make it difficult to use the existent EDA tools for CMOS circuits. We will show recent our development of a top-down design flow for AQFP logic circuits, which is composed of logic synthesis, logic simulation, and automated place & routing by using our HDL model and the physical layouts of the logic cells. Several AQFP circuits, such as carry-look-ahead adders, decoders, and shifters, were successfully demonstrated by using this approach. Perspective and challenges for designing large-scale AQFP circuits will be discussed based on the recent studies.
