Realization of Four-Terminal Switching Lattices:Technology Development and Circuit Modeling
Serzat Safaltin1,a, Oguz Gencer2, M. Ceylan Morgul3,c, Levent Aksoy3,d, Sebahattin Gurmen1,b, Csaba Andras Moritz 4 and Mustafa Altun3,e
1Metallurgical and Materials Engineering, Istanbul Technical University Istanbul, Turkey
asafaltin@itu.edu.tr
bgurmen@itu.edu.tr
2Nanoscience and Nanoengineering, Istanbul Technical University Istanbul, Turkey
gencer18@itu.edu.tr
3Electronics and Communication Engineering, Istanbul Technical University Istanbul, Turkey
cmorgul@itu.edu.tr
daksoyl@itu.edu.tr
ealtunmus@itu.edu.tr
4Electrical and Computer Engineering, University of Massachusetts, Amherst Massachusetts, USA
andras@ecs.umass.edu
ABSTRACT
Our European Union’s Horizon-2020 project aims to develop a complete synthesis and performance optimization methodology for switching nano-crossbar arrays that leads to the design and construction of an emerging nanocomputer. Within the project, we investigate different computing models based on either two-terminal switches, realized with field effect transistors, resistive and diode devices, or four-terminal switches. Although a four-terminal switch based model offers a significant area advantage, its realization at the technology level needs further justifications and raises a number of questions about its feasibility. In this study, we answer these questions. First, by using three dimensional technology computer-aided design (TCAD) simulations, we show that four-terminal switches can be directly implemented with the CMOS technology. For this purpose, we try different semiconductor gate materials in different formations of geometric shapes. Then, by fitting the TCAD simulation data to the standard CMOS current-voltage equations, we develop a Spice model of a four-terminal switch. Finally, we successfully perform Spice circuit simulations on four-terminal switches with different sizes. As a follow-up work within the project, we will proceed to the fabrication step.
Keywords: Emerging technologies, Four-terminal switching lattice, Technology simulation, Device modeling, Circuit analysis
