RAGra: Leveraging Monolithic 3D ReRAM for Massively-Parallel Graph Processing
Yu Huanga, Long Zhengb, Xiaofei Liaoc, Hai Jind, Pengcheng Yaoe and Chuangyi Guif
Huazhong University of Science and Technology, Wuhan, China
ayuh@hust.edu.cn
blongzh@hust.edu.cn
cxfliao@hust.edu.cn
dhjin@hust.edu.cn
epcyao@hust.edu.cn
fchygui@hust.edu.cn
ABSTRACT
With the maturity of monolithic 3D integration, 3D ReRAM provides impressive storage-density and computationalparallelism with great opportunities for parallel-graph processing acceleration. In this paper, we present RAGra, a 3D ReRAMbased graph processing accelerator, which has two significant technical highlights. First, monolithic 3D ReRAM usually has the complexly-intertwined feature with shared input wordlines and output bitlines for different layers. We propose novel mapping schemes, which can guide to apply different graph algorithms into 3D ReRAM seamlessly and correctly for exposing the inherentlyirregular parallelism of 3D ReRAM. Second, consider the sparsity of real-world graphs, we further propose a row- and columnmixed execution model, which can filter invalid subgraphs for exploiting the massive parallelism of 3D ReRAM. Our evaluation on 8-layer stacked ReRAM shows that RAGra outperforms stateof-the-art planar (2D) ReRAM based graph accelerator GraphR by 6.18× performance improvement and 2.21× energy saving, on average. In particular, RAGra significantly outperforms Grid-Graph (a typical CPU-based graph system) by up to 293.12×.
