Single-Event Double-Upset Self-Recoverable and Single-Event Transient Pulse Filterable Latch Design for Low Power Applications
Aibin Yan1,a, Yuanjie Hu1, Jie Song1 and Xiaoqing Wen2
1Anhui Engineering Laboratory of IoT Security Technologies, Anhui University, Hefei, China
aabyan@mail.ustc.edu.cn
2Kyushu Institute of Technology, Fukuoka, Japan
ABSTRACT
This paper presents a single-event double-upset (SEDU) self-recoverable and single-event transient (SET) pulse filterable latch design for low power applications in 22nm CMOS technology. The latch mainly consists of eight mutually feeding back C-elements and a Schmitt trigger. Simulation results have demonstrated both the SEDU self-recoverability and SET pulse filterability for the latch using redundant silicon area. Using clock gating technology, the latch saves about 54.85% power dissipation on average compared with the up-to-date SEDU self-recoverable latch designs which are not SET pulse filterable at all.
