Published on DATE 2013 (https://past.date-conference.com/date13)

Home > Thursday 21 March 2013 At-A-Glance

Thursday 21 March 2013 At-A-Glance

Interactive Presentations: 10:00 - 10:30 IP4 (in room Exhibition Hall (espace accueil)) / 15:30 - 16:00 IP5 (in room Exhibition Hall (espace accueil))

Track /
Room		08:30 - 10:0010:00 - 12:0010:00 - 10:3011:00 - 12:3012:00 - 14:0013:30 - 14:0014:00 - 16:0014:00 - 15:3514:00 - 15:3015:30 - 16:0016:00 - 17:30
Track 1
Oisans		9.1 SPECIAL DAY on "Electronic Technologies for Smart Cities" - HOT TOPIC: Smart Grid and Buildings10.1 SPECIAL DAY on "Electronic Technologies for Smart Cities" - HOT TOPIC: Smart Data Centers Design and Optimization11.1 SPECIAL DAY on "Electronic Technologies for Smart Cities" - HOT TOPIC: Smart Health12.1 SPECIAL DAY on "Electronic Technologies for Smart Cities" - HOT TOPIC: Internet of Energy - Connecting Smart Mobility in the Cloud
Track 2
Belle-Etoile		9.2 System-Level Analysis and Simulation10.2 EMBEDDED TUTORIAL: On the Use of GP-GPUs for Accelerating Computing-Intensive EDA Applications11.2 High-Level Synthesis and Coarse-Grained Reconfigurable Architectures12.2 Methodologies to Improve Yield, Reliability and Security in Embedded Systems
Track 3
Stendahl		9.3 Thermal/Power Management Techniques for Energy-Efficient Systems10.3 Thermal Analysis and Power Optimization Techniques11.3 Efficient NoC Routing Mechanisms12.3 NoC Mapping and Synthesis
Track 4
Chartreuse		9.4 Emerging Architectures10.4 Abstraction Techniques and SAT/SMT-Based Optimizations11.4 System-Level Modelling for Physical Properties12.4 Emerging Logic
Track 5
Meije		9.5 Manufacturing and Design Security10.5 Design and Verification of Mixed-Signal Circuits11.5 Energy Challenges for Multi-Core and NoC Architectures12.5 Emerging Technology Architectures for Energy-Efficient Memories
Track 6
Bayard		9.6 Improving IC Quality and Lifetime Though Advanced Characterization10.6 On-Line Testing Techniques11.6 Modelling and Design for Signal and Power Integrity12.6 Clock Distribution and Analogue Circuit Synthesis
Track 7
Les Bans		9.7 Design and Scheduling10.7 Embedded Software for Many-Core Architectures11.7 Powerful Aging12.7 Physical Design
Track
Booth 46, Exhibition		UB09 Session 9UB10 Session 10UB11 Session 11
Track
Exhibition Hall (espace accueil)		IP4 Interactive PresentationsIP5 Interactive Presentations
Track 8
Lesdigiueres (Exhibition Theatre)		10.8 PANEL: Will 3D-IC Remain a Technology of the Future… Even in the Future?11.8 EMBEDDED TUTORIAL: Advances in Asynchronous Logic: from Principles to GALS & NoC, Recent Industry Applications, and Commercial CAD Tools12.8 EMBEDDED TUTORIAL: Closed-Loop Control for Power and Thermal Management in Multi-core Processors: Formal Methods and Industrial Practice
Track 0
Oisans		11.0 Special Day Keynote on "Electronic Technologies for Smart Cities"
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