Date: Thursday 21 March 2013
Time: 11:00 - 12:30
Location / Room: Meije

Chair:
Catherine Dehollain, EPFL, CH

Co-Chair:
Gunhan Dundar, Bogazici University, TR

Some key questions in mixed-signal design are low-power design, modeling, and verification. This session addresses design of low power, low-voltage sensor interfaces as well as non-linear model extraction of analogue circuits and statistical MOSFET models. On the verification front, formal verification of analogue circuits and reachability analysis of non-linear circuits are discussed.

Time	Label	Presentation Title Authors
11:00	10.5.1	A LOW-POWER AND LOW-VOLTAGE BBPLL-BASED SENSOR INTERFACE IN 130NM CMOS FOR WIRELESS SENSOR NETWORKS Authors: Jelle Van Rethy, Hans Danneels, Valentijn De Smedt, Wim Dehaene and Georges Gielen, KU Leuven, BE Abstract
11:30	10.5.2	(Best Paper Award Candidate) REACHABILITY ANALYSIS OF NONLINEAR ANALOG CIRCUITS THROUGH ITERATIVE REACHABLE SET REDUCTION Authors: Seyed Nematollah Ahmadyan and Shobha Vasudevan, University of Illinois at Urbana-Champaign, US Abstract
12:00	10.5.3	FORMAL VERIFICATION OF ANALOG CIRCUIT PARAMETERS ACROSS VARIATION UTILIZING SAT Authors: Merritt Miller and Forrest Brewer, University of California, Santa Barbara, US Abstract
12:15	10.5.4	EXTRACTING ANALYTICAL NONLINEAR MODELS FROM ANALOG CIRCUITS BY RECURSIVE VECTOR FITTING OF TRANSFER FUNCTION TRAJECTORIES Authors: Dimitri De Jonghe1, Dirk Deschrijver2, Tom Dhaene2 and Georges Gielen1 1KU Leuven, BE; 2University of Ghent, BE Abstract
12:30	IP5-5, 364	STATISTICAL MODELING WITH THE VIRTUAL SOURCE MOSFET MODEL Authors: Li Yu1, Lan Wei1, Dimitri Antoniadis1, Ibrahim Elfadel2 and Duane Boning1 1Massachusetts Institute of Technology, US; 2Masdar Institute of Science and Technology, AE Abstract
12:31	IP5-6, 723	AUTOMATIC CIRCUIT SIZING TECHNIQUE FOR THE ANALOG CIRCUITS WITH FLEXIBLE TFTS CONSIDERING PROCESS VARIATION AND BENDING EFFECTS Authors: Yen-Lung Chen, Wan-Rong Wu, Guan-Ruei Lu and Chien-Nan Jimmy Liu, National Central University, TW Abstract
12:30		End of session Lunch Break in Ecrins Buffet lunch (Eat early for Smart Cities and Communities Keynote - Room Oisans at 1330; http://www.date-conference.com/conference/session/11.0)