12.3 NoC Mapping and Synthesis

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Date: Thursday 21 March 2013
Time: 16:00 - 17:30
Location / Room: Stendahl

Chair:
Andreas Hansson, ARM, UK

Co-Chair:
Jaime Murillo, EPFL, CH

This session optimizes NoC performance by means of design-time algorithms. Two of the papers focus on mapping of applications on NoCs, while the third proposes new means of synthesizing efficient NoC topologies.

TimeLabelPresentation Title
Authors
16:0012.3.1SHARED MEMORY AWARE MPSOC SOFTWARE DEPLOYMENT
Authors:
Timo Schönwald1, Alexander Viehl1, Oliver Bringmann2 and Wolfgang Rosenstiel2
1FZI Forschungszentrum Informatik, DE; 2University of Tuebingen, DE
Abstract
16:3012.3.2FAST AND OPTIMIZED TASK ALLOCATION METHOD FOR LOW VERTICAL LINK DENSITY 3-DIMENSIONAL NETWORKS-ON-CHIP BASED MANY CORE SYSTEMS
Authors:
Haoyuan Ying1, Thomas Hollstein2 and Klaus Hofmann1
1Darmstadt University of Technology, DE; 2Tallinn University of Technology, EE
Abstract
17:0012.3.3A SPECTRAL CLUSTERING APPROACH TO APPLICATION-SPECIFIC NETWORK-ON-CHIP SYNTHESIS
Authors:
Vladimir Todorov1, Daniel Mueller-Gritschneder2, Helmut Reinig1 and Ulf Schlichtmann2
1Intel Mobile Communications, DE; 2Technische Universität München, DE
Abstract
17:30End of session