Date: Thursday 21 March 2013
Time: 10:00 - 10:30
Location / Room: Exhibition Hall (espace accueil)

Interactive Presentations run simulatenously during a 30-minute slot. A poster associated to the IP paper is on display throughout the morning. Additionally, each IP paper is briefly introduced in a one-minute presentation in a corresponding regular session, prior to the actual Interactive Presentation.

Label	Presentation Title Authors
IP4-1	EFFICIENT AND SCALABLE OPENMP-BASED SYSTEM-LEVEL DESIGN Authors: Alessandro Cilardo, Luca Gallo, Antonino Mazzeo and Nicola Mazzocca, University of Naples Federico II, IT Abstract
IP4-2	UTILIZING VOLTAGE-FREQUENCY ISLANDS IN C-TO-RTL SYNTHESIS FOR STREAMING APPLICATIONS Authors: Xinyu He1, Shuangchen Li1, Yongpan Liu1, X. Sharon Hu2 and Huazhong Yang1 1Tsinghua University, CN; 2University of Notre Dame, US Abstract
IP4-3	BICONDITIONAL BDD: A NOVEL CANONICAL BDD FOR LOGIC SYNTHESIS TARGETING XOR-RICH CIRCUITS Authors: Luca Amarú, Pierre-Emmanuel Gaillardon and Giovanni De Micheli, EPFL, CH Abstract
IP4-4	OPTIMIZING BDDS FOR TIME-SERIES DATASET MANIPULATION Authors: Stergios Stergiou and Jawahar Jain, Fujitsu, US Abstract
IP4-5	INCORPORATING THE IMPACTS OF WORKLOAD-DEPENDENT RUNTIME VARIATIONS INTO TIMING ANALYSIS Authors: Farshad Firouzi1, Saman Kiamehr1, Sani Nassif2 and Mehdi Tahoori1 1Karlsruhe Institute of Technology, DE; 2IBM, US Abstract
IP4-6	AN AREA-EFFICIENT NETWORK INTERFACE FOR A TDM-BASED NETWORK-ON-CHIP Authors: Jens Sparsø, Evangelia Kasapaki and Martin Schoeberl, Technical University of Denmark, DK Abstract
IP4-7	CARS: CONGESTION-AWARE REQUEST SCHEDULER FOR NETWORK INTERFACES IN NOC-BASED MANYCORE SYSTEMS Authors: Masoud Daneshtalab, Masoumeh Ebrahimi, Juha Plosila and Hannu Tenhunen, University of Turku, FI Abstract
IP4-8	A FAST AND EFFICIENT DFT FOR TEST AND DIAGNOSIS OF POWER SWITCHES IN SOCS Authors: Xiaoyu Huang, Jimson Mathew, Rishad A Shafik, Subhashish Bhattacharjee and Dhiraj K Pradhan, University of Bristol, UK Abstract
IP4-9	MULTIRATE CONTROLLER DESIGN FOR RESOURCE- AND SCHEDULE-CONSTRAINED AUTOMOTIVE ECUS Authors: Dip Goswami1, Alejandro Masrur1, Reinhard Schneider1, Chun Jason Xue2 and Samarjit Chakraborty1 1Technische Universität München, DE; 2City University of Hong Kong, HK Abstract
IP4-10	DESIGN OF AN ULTRA-LOW POWER DEVICE FOR AIRCRAFT STRUCTURAL HEALTH MONITORING Authors: Alessandro Perelli1, Carlo Caione1, Luca De Marchi1, Davide Brunelli2, Alessandro Marzani1 and Luca Benini1 1University of Bologna, IT; 2University of Trento, IT Abstract
IP4-11	(Best Paper Award Candidate) FAST AND ACCURATE TLM SIMULATIONS USING TEMPORAL DECOUPLING FOR FIFO-BASED COMMUNICATIONS Authors: Claude Helmstetter1, Jérôme Cornet2, Matthieu Moy3, Pascal Vivet1 and Bruno Galilée2 1CEA-Leti, FR; 2STMicroelectronics, FR; 3Verimag, FR Abstract
IP4-12	DETERMINING RELEVANT MODEL ELEMENTS FOR THE VERIFICATION OF UML/OCL SPECIFICATIONS Authors: Julia Seiter, Robert Wille, Mathias Soeken and Rolf Drechsler, University of Bremen, DE Abstract
IP4-13	TOWARDS A GENERIC VERIFICATION METHODOLOGY FOR SYSTEM MODELS Authors: Robert Wille, Martin Gogolla, Mathias Soeken, Mirco Kuhlmann and Rolf Drechsler, University of Bremen, DE Abstract
IP4-14	ACTIVE POWER-GATING-INDUCED POWER/GROUND NOISE ALLEVIATION USING PARASITIC CAPACITANCE OF ON-CHIP MEMORIES Authors: Xuan Wang1, Jiang Xu1, Wei Zhang2, Xiaowen Wu1, Yaoyao Ye1, Zhehui Wang1, Mahdi Nikdast1 and Zhe Wang1 1Hong Kong University of Science and Technology, HK; 2National University of Singapore, SG Abstract
IP4-15	ADAPTIVE THERMAL MANAGEMENT FOR PORTABLE SYSTEM BATTERIES BY FORCED CONVECTION COOLING Authors: Qing Xie1, Siyu Yue1, Donghwa Shin2, Naehyuck Chang2 and Massoud Pedram1 1University of Southern California, US; 2Seoul National University, KR Abstract
IP4-16	CACHE COHERENCE ENABLED ADAPTIVE REFRESH FOR VOLATILE STT-RAM Authors: Jianhua Li1, Liang Shi1, Qingan Li2, Chun Jason Xue3, Yiran Chen4 and Yinlong Xu1 1University of Science and Technology of China, CN; 2Wuhan University, CN; 3City University of Hong Kong, CN; 4University of Pittsburgh, US Abstract
IP4-17	IS TSV-BASED 3D INTEGRATION SUITABLE FOR INTER-DIE MEMORY REPAIR? Authors: Mihai Lefter, George Razvan Voicu, Mottaqiallah Taouil, Marius Enachescu, Said Hamdioui and Sorin Dan Cotofana, Delft University of Technology, NL Abstract
IP4-18	THERMOMECHANICAL STRESS-AWARE MANAGEMENT FOR 3D IC DESIGNS Authors: Qiaosha Zou1, Tao Zhang1, Eren Kursun2 and Yuan Xie1 1Pennsylvania State University, US; 2IBM Research, US Abstract
IP4-19	REVERSE ENGINEERING DIGITAL CIRCUITS USING FUNCTIONAL ANALYSIS Authors: Pramod Subramanyan, Nestan Tsiskaridze, Kanika Pasricha, Dillon Reisman, Adriana Susnea and Sharad Malik, Princeton University, US Abstract
IP4-20	A PRACTICAL TESTING FRAMEWORK FOR ISOLATING HARDWARE TIMING CHANNELS Authors: Jason Oberg1, Sarah Meiklejohn1, Timothy Sherwood2 and Ryan Kastner1 1University of California, San Diego, US; 2University of California, Santa Barbara, US Abstract
IP4-21	DESIGN AND IMPLEMENTATION OF AN ADAPTIVE PROACTIVE RECONFIGURATION TECHNIQUE FOR SRAM CACHES Authors: Peyman Pouyan, Esteve Amat, Francesc Moll and Antonio Rubio, Universitat Politècnica de Catalunya, ES Abstract
IP4-22	A VIRTUAL PROTOTYPING PLATFORM FOR REAL-TIME SYSTEMS WITH A CASE STUDY FOR A TWO-WHEELED ROBOT Authors: Daniel Mueller-Gritschneder1, Kun Lu1, Erik Wallander1, Marc Greim1 and Ulf Schlichtmann2 1Technische Universitaet Muechen, DE; 2Technische Universität München, DE Abstract
IP4-23	SUFFICIENT REAL-TIME ANALYSIS FOR AN ENGINE CONTROL UNIT WITH CONSTANT ANGULAR VELOCITIES Authors: Victor Pollex1, Timo Feld1, Frank Slomka1, Ulrich Margull2, Ralph Mader3 and Gerhard Wirrer3 1Ulm University, DE; 2Ingolstadt University of Applied Sciences, DE; 3Continental, DE Abstract