Date: Thursday 21 March 2013
Time: 16:00 - 17:30
Location / Room: Les Bans

Chair:
Carl Sechen, University of Texas at Dallas, US

Co-Chair:
Bill Swartz, InternetCAD, US

The first paper proposes solving the Lagrangian dual problem using discrete gate sizes. The second paper describes accurate meta-modelling techniques applicable to IC design. The third paper suggests better wire lengths in placement are obtained using a super-linear weighting factor. The last paper shows the advantages of doing layer assignment before global routing.

Time	Label	Presentation Title Authors
16:00	12.7.1	FAST AND EFFICIENT LAGRANGIAN RELAXATION-BASED DISCRETE GATE SIZING Authors: Vinicius dos S. Livramento1, Chrystian Guth1, José Luís Güntzel1 and Marcelo O. Johann2 1Federal University of Santa Catarina, BR; 2Federal University of Rio Grande do Sul, BR Abstract
16:30	12.7.2	ENHANCED METAMODELING TECHNIQUES FOR HIGH-DIMENSIONAL IC DESIGN ESTIMATION PROBLEMS Authors: Andrew B. Kahng, Bill Lin and Siddhartha Nath, University of California, San Diego, US Abstract
17:00	12.7.3	SUB-QUADRATIC OBJECTIVES IN QUADRATIC PLACEMENT Author: Markus Struzyna, University of Bonn, DE Abstract
17:15	12.7.4	CATALYST: PLANNING LAYER DIRECTIVES FOR EFFECTIVE DESIGN CLOSURE Authors: Yaoguang Wei1, Zhuo Li2, Cliff Sze2, Shiyan Hu3, Charles J. Alpert2 and Sachin S. Sapatnekar1 1University of Minnesota - Twin Cities, US; 2IBM Research - Austin, US; 3Michigan Technological University, US Abstract
17:30		End of session