W04 Design Automation for Understanding Hardware Designs (DUHDE5)

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Agenda

TimeLabelSession
08:30W04.1Design Understanding for Risk Reduction
08:30W04.1.1Design Risk Analysis Based on Version Control Data
Raviv Gal, IBM Haifa, IL

09:30W04.1.2A Test Register Assignment Method to Reduce the Number of Test Patterns Using Controller Augmentation
Syun Takeda1, Toshinori Hosokawa1, Hiroshi Yamazaki1 and Masayoshi Yoshimura2
1College of Industrial Technology, Nihon University, JP; 2Kyoto Sangyo University, JP

09:45W04.1.3A Secure Design Method to Detect for Trojan Circuit inserted in Manufacturing Process
Yoshinobu Okuda, Kohei Ohyama and Masayoshi Yoshimura, Kyoto Sangyo University, JP

10:30W04.2Turning Data into Knowledge: Tools and Applications I
10:30W04.2.1SymbiYosys: Investigating and Verifying Hardware Designs with Formal Open Source Tools
Clifford Wolf, TU Wien, AT

11:30W04.2.2Modeling Heterogeneous Embedded Systems with TTool
Daniela Genius1, Marie-Minerve Louerat1, Francois Pecheux1, Ludovic Apvrille2 and Haralampos Stratigopoulos1
1UPMC/LIP6, FR; 2System-on-Chip Laboratory (LabSoC), FR

13:00W04.3Turning Data into Knowledge: Tools and Applications II
13:00W04.3.1UMLAUT: Synthesis of Natural Language from Constrained UML Models
Martin Ring1, Jannis Stoppe2 and Rolf Drechsler3
1Cyber-Physical Systems, DFKI GmbH, DE; 2German Aerospace Center (DLR), Institute for the Protection of Maritime Infrastructures, DE; 3University of Bremen/DFKI GmbH, DE

13:30W04.3.2Subtree Identification for Generating Assertions from Natural Language Descriptions
Ian Harris, University of Californa Irvine, US

14:00W04.3.3Time-stamps for Hardware Simulation Models Accurate Time-back Annotation
Rehab Massoud1, Jannis Stoppe2 and Rolf Drechsler3
1Group of Computer Architecture, University of Bremen, DE; 2German Aerospace Center (DLR), Institute for the Protection of Maritime Infrastructures, DE; 3University of Bremen/DFKI GmbH, DE

15:00W04.4Current and Future Techniques
15:00W04.4.1Unconventional Computing - What, Why and How
Jan Madsen, Technical University of Denmark, DK

16:00W04.4.2PGSL: Identifying Functional Primitives in Hardware Description Language (HDL) Specifications
Christian Krieg, Martin Mosbeck, Clifford Wolf and Axel Jantsch, TU Wien, AT

16:30W04.4.3Execution Environment for Dynamic Software Runtime Examination
Kenneth Schmitz1, Oliver Keszöcze1, Jannis Stoppe2 and Rolf Drechsler3
1University of Bremen, DE; 2German Aerospace Center (DLR), Institute for the Protection of Maritime Infrastructures, DE; 3University of Bremen/DFKI GmbH, DE