Eleven pre-conference tutorials will be given on Monday. Five are full-day tutorials (A, B, C, F and G). Six are half-day tutorials, three to be given in the morning (D1, E1, and H1) and three in the afternoon (D2, E2, and H2). A participant should enroll for either one full-day tutorial or one morning and/or one afternoon half-day tutorial (it is possible to attend for a morning or afternoon only in the case of the half-day tutorials). Combination of a full-day tutorial with a half-day tutorial is not allowed.
You may download here the description of all DATE 2013 Monday Tutorials.
The titles, organisers, speakers, and abstracts of the tutorials are given below:
All tutorials run in parallel in accordance with the timetable below.
Rooms will be signposted.
0730-0930 | Registration and Tutorial Welcome Refreshments |
0930-1100 | Tutorials |
1100-1130 | Break |
1130-1300 | Tutorials |
1300-1430 | Lunch |
1330 | CONFERENCE REGISTRATION BEGINS |
1430-1600 | Tutorials |
1600-1630 | Break |
1630-1800 | Tutorials |
1800-1930 | WELCOME RECEPTION |
1900-2100 | FRINGE TECHNICAL MEETINGS |
For further information please contact:
Tutorials Chair
Session ID | Title | Time | Location / Room | Details |
---|---|---|---|---|
A | Design Automation of Electronic Systems: Past Accomplishments and Challenges Ahead A Tribute to Robert Brayton | 08:15-17:15 | Belle-Etoile | Read More |
B | Advanced Techniques for Power-Aware System-Level Prototyping | 09:30-18:00 | Les Bans | Read More |
C | E-Health: Systems, Components, Technologies | 09:00-18:00 | Chartreuse | Read More |
D1 | Digital Microfluidic Biochips: Towards Hardware/Software Co-Design and Cyberphysical System Integration | 09:30-13:00 | Meije 2 | Read More |
D2 | Hardware Security and Trust | 14:30-18:00 | Meije 2 | Read More |
E1 | Assertion Based Verification: a Common Verification Infrastructure for SoC and Embedded Software | 09:30-13:00 | Meije 3 | Read More |
E2 | Design and Verification of Embedded Systems from Natural Language Descriptions | 14:30-18:00 | Meije 3 | Read More |
F | Post-Silicon Validation: Old Challenges and New Solutions | 09:30-18:00 | Stendhal | Read More |
G | Design Methodologies for Adaptive Circuits and Systems | 09:30-18:00 | Bayard | Read More |
H1 | Mixed-signal DfT & BIST: Trends, Principles, and Solutions | 09:30-13:00 | 7 Laux 4 | Read More |
H2 | Beyond DFT: The Convergence of DFM, Variability, Yield, Diagnosis and Reliability | 14:30-18:00 | 7 Laux 4 | Read More |