DATE PhD Forum 2021

Date: Monday, 01 February 2021
Time: 17:00 - 19:00

The PhD Forum of the DATE Conference is a poster session hosted by the European Design Automation Association (EDAA), the ACM Special Interest Group on Design Automation (SIGDA), and the IEEE Council on Electronic Design Automation (CEDA). The purpose of the PhD Forum is to offer a forum for PhD students to discuss their thesis and research work with people of the design automation and system design community. It represents a good opportunity for students to get exposure on the job market and to receive valuable feedback on their work.

To this end, the forum takes place in two parts:
• First, everybody is invited to an opening session of the PhD Forum, where all presenters will present their work by means of a 1min pitch.
• After that (at approx. 17:30), all presenters will present their work within a 1.5 hour "poster" presentation in separate rooms. Within this timeframe, everyone can enter and leave the respective rooms and engage in corresponding discussions.

Furthermore, for each presentation, a poster (in pdf) summarizing the presentation will be provided.

Robert Wille, Johannes Kepler University Linz (Chair, DATE PhD Forum 2021)

PhD Forum Committee
Juergen Alt, Intel Germany
Armin Biere, Johannes Kepler University Linz
Philip Brisk, University of California, Riverside
Luigi Carro, UFRGS
Anupam Chattopadhyay, Nanyang Technological University
Rolf Drechsler, University of Bremen/DFKI
Marco Grossi, Università di Bologna
Ian Harris, University of California Irvine
Tsung-Yi Ho, National Tsing Hua University
Oliver Keszocze, Friedrich-Alexander University Erlangen
Martin Omana, DEI - University of Bologna
Graziano Pravadelli, University of Verona
Felipe Rocha da Rosa, UFRGS
Andreas Steininger, Vienna University of Technology
Sander Stuijk, Eindhoven University
Daniel Tille, Infineon Technologies
Shigeru Yamashita, Ritsumeikan University

Admitted Presentations

	FM01.1.1 Exploiting Error Resilience of Iterative and Accumulation based Algorithms for Hardware Efficiency Dr. G.A. Gillani, University of Twente, NL
	FM01.1.2 Improving Energy Efficiency of Neural Networks Seongsik Park, Seoul National University, KR
	FM01.1.3 Design, Implementation and Analysis of Efficient Hardware-based Security Primitives Nalla Anandakumar Nachimuthu, Society for Electronic Transactions and Security (SETS), IN
	FM01.1.4 Formal Abstraction and Verification of Analog Circuits Ahmad Tarraf, research assistant uni frankfurt, DE
	FM01.1.5 Optimization Tools for Convnets on the Edge Valentino Peluso, Politecnico di Torino, IT
	FM01.1.6 Design Space Exploration in High Level Synthesis Lorenzo Ferretti, Università della Svizzera italiana, CH
	FM01.1.7 Reliability Improvement of Stt-Mram Cache Memories in Data Storage Systems Elham Cheshmikhani, Sharif University of Technology, IR
	FM01.1.8 Enabling Logic-Memory Synergy using Integrated Non-Volatile Transistor Technologies for Energy-Efficient Computing Sandeep Krishna Thirumala, Purdue University, US
	FM01.1.9 Hardware Security in Drams and Processor Caches Wenjie Xiong, Facebook AI Research, US
	FM01.1.10 Real-Time High-Performance Computing for Embedded Control Systems Alejandro J. Calderón, Ikerlan Technology Research Centre, ES
	FM01.1.11 Less is More: Efficient Hardware Design through Approximate Logic Synthesis Ilaria Scarabottolo, USI Lugano, CH
	FM01.1.12 Longlivenoc: Wear Levelling, Write Reduction and Selective Vc Allocation for Long Lasting Dark Silicon Aware Noc Interconnects Khushboo Rani, IIT Guwahati, IN
	FM01.1.13 Energy Efficient and Runtime based Approximate Computing Techniques for Image Compression Application: An Integrated Approach Covering Circuit to Algorithmic Level Junqi Huang, University of Nottingham Malaysia, MY
	FM01.1.14 Thesis: Performance and Physical Attack Security of Lattice-based Cryptography Felipe Valencia, Univesità della Svizzera Italiana, CH
	FM01.1.15 Amoeba-Inspired System Controller on Iot Edge Anh Nguyen, Tokyo Institute of Technology, JP
	FM01.1.16 Monitoring and Controlling Interconnect Contention in Critical Realtime Systems Jordi Cardona, Barcelona Supercomputing Center and Universitat Politecnica de Catalunya, ES
	FM01.1.17 Reliability Considerations in the use of High-Performance Processors in Safety-Critical Systems Sergi Alcaide, Universitat Politècnica de Catalunya - Barcelona Supercomputing Center (BSC), ES
	FM01.1.18 Hardware Security Evaluation of Iot Embedded Applications Zahra Kazemi, PhD. Candidate, FR
	FM01.1.19 A Computer-Aided Design Space Exploration for Dependable Circuits Stefan Scharoba, Brandenburg University of Technology, DE
	FM01.1.20 Robust and Energy-Efficient Deep Learning Systems Muhammad Abdullah Hanif, Institute of Computer Engineering, Vienna University of Technology, AT
	FM01.1.21 Automated Design of Approximate Accelerators Jorge Castro-Godínez, Karlsruhe Institute of Technology (KIT), DE
	FM01.1.22 Next Generation Design for Testability, Debug and Reliability using Formal Techniques Sebastian Huhn, University of Bremen, DE
	FM01.1.23 Design Automation for Field-Coupled Nanotechnologies Marcel Walter, University of Bremen, DE
	FM01.1.24 Hardware and Software Techniques for Securing Intelligent Cyberphysical Systems Faiq Khalid, TU Wien, AT