Fan-out of 2 Triangle Shape Spin Wave Logic Gates
Abdulqader Mahmoud1,a, Frederic Vanderveken2,a, Florin Ciubotaru2,b, Christoph Adelmann2,c, Sorin Cotofana1,b and Said Hamdioui1,c
1Computer Engineering Laboratory, Delft University of Technology, Delft, Netherlands
aA.N.N.Mahmoud@tudelft.nl
bS.D.Cotofana@tudelft.nl
cS.Hamdioui@tudelft.nl
2IMEC, Leuven, Belgium
aFrederic.Vanderveken@imec.be
bFlorin.Ciubotaru@imec.be
cChristoph.Adelmann@imec.be
ABSTRACT
Having multi-output logic gates saves much energy because the same structure can be used to feed multiple inputs of next stage gates simultaneously. This paper proposes novel triangle shape fanout of 2 spin wave Majority and XOR gates; the Majority gate is achieved by phase detection, whereas the XOR gate is achieved by threshold detection. The proposed logic gates are validated by means of micromagnetic simulations. Furthermore, the energy and delay are estimated for the proposed structures and compared with the state-of-the-art spin wave, and 16nm and 7nm CMOS logic gates. The results demonstrate that the proposed structures provide energy reduction of 25%-50% in comparison to the other 2-output spin-wave devices while having the same delay, and energy reduction of 43x-0.8x when compared to the 16nm and 7nm CMOS counterparts while having delay overhead of 11x-40x.
Keywords: Spin-wave, Spin-wave Computation Paradigm, Triangle Shape Logic Gate, Fan-out, Energy Efficiency.
