Analyzing ARM CoreSight ETMv4.x Data Trace Stream with a Real-time Hardware Accelerator
Seyed Mohammad Ali Zeinolabedina, Johannes Partzschb and Christian Mayrc
Chair of Highly-Parallel VLSI Systems and Neuro-Microelectronics, Technische Universität Dresden, Dresden, Germany
aali.zeinolabedin@tu-dresden.de
bjohannes.partzsch@tu-dresden.de
cchristian.mayr@tu-dresden.de
ABSTRACT
Debugging and verification of modern SoCs is a vital step in realizing complex systems consisting of various components. Monitoring memory operations such as data transfer address and value is an essential debugging and verification feature. ARM CoreSight technology generates a specific debug trace stream standard to monitor the memory without affecting the normal execution of the system. This paper proposes a hardware architecture to analyze the debug trace stream in realtime. It is implemented on the Xilinx Virtex xc6vcx75t-2ff784 FPGA device and can operate at 125 MHz and occupies less than 8% of the FPGA resources.
Keywords: Debugging, System Analysis and Design, System-Onchips, System Verification.
