DATE 2018 Best Papers

• The DATE 2018 Best Papers

• Best Paper Award Nominations

DATE Best Paper Awards

Each year the Design, Automation and Test in Europe Conference presents awards to the authors of the best papers. The selection is performed by the award committee.

The DATE 2018 best papers are:

D Track

Efficient Verification Of Multi-Property Designs (The Benefit Of Wrong Assumptions)
Eugene Goldberg¹, Matthias Gudemann¹, Daniel Kroening¹, Rajdeep Mukherjee²
¹ DiffBlue, ² Oxford University

A Track

MATIC: Learning Around Errors for Efficient Low-Voltage Neural Network Accelerators
Sung Kim, Patrick Howe, Thierry Moreau, Armin Alaghi, Luis Ceze and Visvesh Sathe
University of Washington

T Track

Low-Cost High-Accuracy Variation Characterization for Nanoscale IC Technologies via Novel Learning-based Techniques
Zhijian Pan¹, Miao Li², Jian Yao², Hong Lu², Zuochang Ye¹, Yanfeng Li², Yan Wang¹
¹ Tsinghua University, ² Platform Design Automation, Inc.

E Track

Buffer-aware bounds to multi-point progressive blocking in priority-preemptive NoCs
Leandro Indrusiak¹, Alan Burns², Borislav Nikolic³
¹ University of York, ² University of York, ³CISTER/INESC-TEC, ISEP, IPP

Best Paper Award Nominations

D track

HVSM: Hardware-Variability Aware Streaming Processors' Management Policy in GPUs
Jingweijia Tan, Kaige Yan
Jilin University

Sensei: An Area-Reduction Advisor for FPGA High-Level Synthesis
Hsuan Hsiao, Jason H. Anderson
University of Toronto

Multi-Bit Non-Volatile Spintronic Flip-Flop
Christopher Münch, Rajendra Bishnoi, Mehdi Tahoori
Karlsruhe Institute of Technology

Trident: A Comprehensive Timing Error Resilient Technique against Choke Points at NTC
Aatreyi Bal, Sanghamitra Roy, Koushik Chakraborty
Utah State University

An Inside Job: Remote Power Analysis Attacks on FPGAs
Falk Schellenberg¹, Dennis Gnad², Amir Moradi¹, Mehdi Tahoori²
¹ Ruhr University Bochum, ² Karlsruhe Institute of Technology

Compact Modeling of Carbon Nanotube Thin Film Transistors for Flexible Circuit Design
Leilai Shao¹, Tsung-Ching Huang², Ting Lei³, Zhenan Bao³, Raymond Beausoleil², Tim Cheng⁴
¹ University of California Santa Barbara, ² Hewlett Packard Labs, ³ Stanford University, ⁴ Hong Kong University of Science and Technology

CAMP: Accurate Modeling of Core and Memory Locality for Proxy Generation of Big-data Applications
Reena Panda, Xinnian Zheng, Andreas Gerstlauer, Lizy John
University of Texas at Austin

HME: A Lightweight Emulator for Hybrid Memory
Zhuohui Duan, Haikun Liu, Xiaofei Liao
Huazhong University of Science and Technology

FFT-Based Deep Learning Deployment in Embedded Systems
Sheng Lin¹, Ning Liu¹, Mahdi Nazemi², Hongjia Li¹, Caiwen Ding¹, Yanzhi Wang², Massoud Pedram²
¹ Syracuse University, ² University of Southern California

A Faithful Binary Circuit Model with Adversarial Noise
Matthias Fuegger¹, Jürgen Maier², Robert Najvirt², Thomas Nowak³, Ulrich Schmid²
¹ LSV, CNRS & ENS Paris-Saclay, ² TU Wien, ³ Université Paris Sud

A track

HyVE: Hybrid Vertex-Edge Memory Hierarchy for Energy-Efficient Graph Processing
Tianhao Huang; Guohao Dai; Yu Wang; Huazhong Yang
Tsinghua University

GIS-Based Optimal Photovoltaic Panel Floorplanning for Residential Installations
Sara Vinco; Lorenzo Bottaccioli, Edoardo Patti, Andrea Acquaviva, Enrico Macii, Massimo Poncino
Politecnico di Torino

A Fast and Resource Efficient FPGA Implementation of Secret Sharing for Storage Applications
Jakob Stangl¹ , Thomas Lorünser², Sai Dinakarrao¹
¹ TU Wien, ² Austrian Institute of Technology