DATE 2016

Technical Program

Tuesday, 15 March 2016
1.1 2.1 2.2 2.3 2.4 2.5 2.6 2.7 3.1 3.2 3.3 3.4
3.5 3.6 3.7 IP1 4.1 4.2 4.3 4.4 4.5 4.6 4.7
Wednesday, 16 March 2016
5.1 5.2 5.3 5.4 5.5 5.6 5.7 IP2 6.1 6.2 6.3 6.4
6.5 6.6 6.7 7.0 7.1 7.2 7.3 7.4 7.5 7.6 7.7 IP3
8.1 8.2 8.3 8.4 8.5 8.6 8.7
Thursday, 17 March 2016
9.1 9.2 9.3 9.4 9.5 9.6 9.7 9.8 IP4 10.1 10.2 10.3
10.4 10.5 10.6 10.7 11.0 11.1 11.2 11.3 11.4 11.5 11.6 11.7
IP5 12.1 12.2 12.3 12.4 12.5 12.6 12.7
SessionOpening Session: Plenary, Awards Ceremony & Keynote Addresses
Session Code / Room1.1 / Großer Saal
Date / TimeTuesday, 15 March 2016 / 08:30 – 10:30
ChairLuca Fanucci, University of Pisa, IT
Co-ChairJürgen Teich, Friedrich-Alexander-Universität Erlangen-Nürnberg, DE

09:15 – 09:45

[Keynote] From the Happy Few to the Happy Many Towards an Intuitive Internet of Things
Luc Van den hove

09:45 – 10:15

[Keynote] Design Will Make Everything Different
Antun Domic

Session TitleExecutive Track Panel: Enabling a Connected World via Internet of Things
Session Code / Room2.1 / Saal 2
Date / TimeTuesday, 15 March 2016 / 11:30 – 13:00
OrganiserYervant Zorian, Synopsys, US

11:30 – 13:00

Mohamed Djadoudi

11:30 – 13:00

Christoph Heer

11:30 – 13:00

Jamil Kawa

11:30 – 13:00

Rudy Lauwereins

11:30 – 13:00

Cheng-Wen Wu

Session TitleEmbedded Tutorial: The Dark Silicon Problem: Technology to the Rescue?
Session Code / Room2. 2 / Konferenz 6
Date / TimeTuesday, 15 March 2016 / 11:30 – 13:00
OrganisersSiddharth Garg, New York University, US
Michael Niemier, University of Notre Dame, South Bend, US
ChairMuhammad Shafique, Karlsruhe Institute of Technology, DE
Co-ChairUmit Ogras, Arizona State University, US

11:30 – 12:00

Towards Performance and Reliability-Efficient Computing in the Dark Silicon Era
Jörg Henkel, Santiago Pagani, Heba Khdr, Florian Kriebel, Semeen Rehman and Muhammad Shafique

12:00 – 12:30

Towards Near-Threshold Server Processors
Ali Pahlevan, Javier Picorel, Arash Pourhabibi Zarandi, Davide Rossi, Marina Zapater, Andrea Bartolini, Pablo G. Del Valle, David Atienza, Luca Benini and Babak Falsafi

12:30 – 13:00

Can Beyond-CMOS Devices Illuminate Dark Silicon?
Robert Perricone, X. Sharon Hu, Joseph Nahas and Michael Niemier

Session TitleAutomotive Systems and Smart Energy Systems
Session Code / Room2.3 / Konferenz 1
Date / TimeTuesday, 15 March 2016 / 11:30 – 13:00
ChairDavid Boyle, Imperial College London, GB
Co-ChairFelix Reimann, Audi Electronics Venture, DE

11:30 – 12:00

OTEM: Optimized Thermal and Energy Management for Hybrid Electrical Energy Storage in Electric Vehicles
Korosh Vatanparvar and Mohammad Abdullah Al Faruque

12:00 – 12:30

Supertask: Maximizing Runnable-level Parallelism in AUTOSAR Applications
Sebastian Kehr, Miloš Panić, Eduardo Quiñones, Bert Böddeker, Jorge Becerril Sandoval, Jaume Abella, Francisco J. Cazorla and Günter Schäfer

12:30 – 12:45

Formal Analysis Based Evaluation of Software Defined Networking for Time-Sensitive Ethernet
Daniel Thiele and Rolf Ernst

12:45 – 13:00

Accelerated Artificial Neural Networks on FPGA for Fault Detection in Automotive Systems
Shanker Shreejith, Bezborah Anshuman and Suhaib A. Fahmy

Session TitlePhysical Design for Cutting-edge Lithography
Session Code / Room2.4 / Konferenz 2
Date / TimeTuesday, 15 March 2016 / 11:30 – 13:00
ChairJens Lienig, Technische Universität Dresden, DE
Co-ChairPatrick Groeneveld, Synopsys Inc., US

11:30 – 12:00

Optimization for Multiple Patterning Lithography with Cutting Process and Beyond
Jian Kuang and Evangeline F. Y. Young

12:00 – 12:30

A Fast Manufacturability Aware Optical Proximity Correction (OPC) Algorithm with Adaptive Wafer Image Estimation
Ahmed Awad, Atsushi Takahashi and Chikaaki Kodama

12:30 – 12:45

Redundant Via Insertion in Directed Self-Assembly Lithography
Woohyun Chung, Seongbo Shim and Youngsoo Shin

12:45 – 13:00

Improved Performance of 3DIC Implementations Through Inherent Awareness of Mix-and-Match Die Stacking
Kwangsoo Han, Andrew B. Kahng and Jiajia Li

Session TitleEnergy Efficient Systems and Architectures
Session Code / Room2.5 / Konferenz 3
Date / TimeTuesday, 15 March 2016 / 11:30 – 13:00
ChairMladen Berekovic, TU Braunschweig, DE
Co-ChairRolf Ernst, TU Braunschweig, DE

11:30 – 12:00

A Discrete Thermal Controller for Chip-Multiprocessors
Yingnan Cui, Wei Zhang and Bingsheng He

12:00 – 12:30

Swallow: Building an Energy-Transparent Many-Core Embedded Real-Time System
Simon J. Hollis and Steve Kerrison

12:30 – 12:45

A Novel Cache-Utilization Based Dynamic Voltage Frequency Scaling (DVFS) Mechanism for Reliability Enhancements
Yen-Hao Chen, Yi-Lun Tang, Yi-Yu Liu, Allen C.-H. Wu and TingTing Hwang

12:45 – 13:00

Efficient Kernel Management on GPUs
Xiuhong Li and Yun Liang

Session TitleFault-Tolerant Embedded Systems
Session Code / Room2.6 / Konferenz 4
Date / TimeTuesday, 15 March 2016 / 11:30 – 13:00
ChairLothar Thiele, ETH Zurich, CH
Co-ChairJian-Jia Chen, TU Dortmund, DE

11:30 – 12:00

Probabilistic WCET Estimation in Presence of Hardware for Mitigating the Impact of Permanent Faults
Damien Hardy, Isabelle Puaut and Yiannakis Sazeides

12:00 – 12:30

A Four-Mode Model for Efficient Fault-Tolerant Mixed-Criticality Systems
Zaid Al-bayati, Jonah Caplan, Brett H. Meyer and Haibo Zeng

12:30 – 13:00

Providing Formal Latency Guarantees for ARQ-based Protocols in Networks-on-Chip
Eberle A. Rambo, Selma Saidi and Rolf Ernst

Session TitleVariability Challenges in Nanoscale Designs
Session Code / Room2.7 / Konferenz 5
Date / TimeTuesday, 15 March 2016 / 11:30 – 13:00
ChairVikas Chandra, ARM Research, US
Co-ChairSaid Hamdioui, TU Delft, NL

11:30 – 12:00

Achieving 100% Cell-Aware Coverage by Design
Zeye (Dexter) Liu, Ben Niewenhuis, Soumya Mittal and R. D. (Shawn) Blanton

12:00 – 12:30

Modeling Fabrication Non-Uniformity in Chip-Scale Silicon Photonic Interconnects
Mahdi Nikdast, Gabriela Nicolescu, Jelena Trajkovic and Odile Liboiron-Ladouceur

12:30 – 13:00

Efficient Spatial Variation Modeling via Robust Dictionary Learning
Changhai Liao, Jun Tao, Xuan Zeng, Yangfeng Su, Dian Zhou and Xin Li

Session TitleExecutive Track Panel: New Opportunities in Automotive Electronics
Session Code / Room3.1 / Saal 2
Date / TimeTuesday, 15 March 2016 / 14:30 – 16:00
OrganiserYervant Zorian, Synopsys, US

14:30 – 16:00

Josef Stockinger

14:30 – 16:00

Rainer Kress

14:30 – 16:00

Dan Kochpatcharin

14:30 – 16:00

Frank Schirrmeister

Session TitleHot Topic: 3D ICs: Leap Forward to 1,000X Performance
Session Code / Room3.2 / Konferenz 6
Date / TimeTuesday, 15 March 2016 / 14:30 – 16:00
OrganiserVikas Chandra, ARM, US
ChairVikas Chandra, ARM, US
Co-ChairNorbert Wehn, University of Kaiserslautern, DE

14:30 – 15:00

The N3XT 1,000X
Subhasish Mitra, Stanford University, US

15:00 – 15:30

3D Sequential Integration for Monolithic 3DIC Design
Olivier Billoint, CEA-Leti, FR

15:30 – 14:30

3D Technology Driven by 3D Application Requirements: A 3D-Landscape for 3D System Design
Dragomir Milojevic, IMEC, BE

Session TitleOn-Chip Security Testing
Session Code / Room3.3 / Konferenz 1
Date / TimeTuesday, 15 March 2016 / 14:30 – 16:00
ChairGiorgio Di Natale, LIRMM, FR
Co-ChairMarc Witteman, Riscure, NL

14:30 – 15:00

TOTAL: TRNG On-the-fly Testing for Attack Detection using Lightweight Hardware
Bohan Yang, Vladimir Rožic, Nele Mentens, Wim Dehaene and Ingrid Verbauwhede

15:00 – 15:30

On-chip Fingerprinting of IC Topology for Integrity Verification
Maxime Lecomte, Jacques J.A. Fournier and Philippe Maurine

15:30 – 16:00

Activation of Logic Encrypted Chips: Pre-Test or Post-Test?
Muhammad Yasin, Samah Mohamed Saeed, Jeyavijayan (JV) Rajendran and Ozgur Sinanoglu

Session TitleApplication-specific Low-power Techniques
Session Code / Room3.4 / Konferenz 2
Date / TimeTuesday, 15 March 2016 / 14:30 – 16:00
ChairSheldon X.-D. Tan, University of California at Riverside, US
Co-ChairMasaaki Kondo, University of Tokyo, JP

14:30 – 15:00

Multiplier-less Artificial Neurons Exploiting Error Resiliency for Energy-Efficient Neural Computing
Syed Shakib Sarwar, Swagath Venkataramani, Anand Raghunathan and Kaushik Roy

15:00 – 15:30

Significance Driven Hybrid 8T-6T SRAM for Energy-Efficient Synaptic Storage in Artificial Neural Networks
Gopalakrishnan Srinivasan, Parami Wijesinghe, Syed Shakib Sarwar, Akhilesh Jaiswal and Kaushik Roy

15:30 – 16:00

Network Delay-Aware Energy Management for Mobile Systems
Minho Ju, Hyeonggyu Kim and Soontae Kim

Session TitleEmerging Devices and Methodologies for Energy Efficient Systems
Session Code / Room3.5 / Konferenz 3
Date / TimeTuesday, 15 March 2016 / 14:30 – 16:00
ChairMehdi Tahoori, Karlsruhe Institute of Technology, DE
Co-ChairAida Todri-Sanial, LIRMM, FR

14:30 – 15:00

Enabling Simultaneously Bi-Directional TSV Signaling for Energy and Area Efficient 3D-ICs
Sunghyun Park, Alice Wang, Uming Ko, Li-Shiuan Peh and Anantha P. Chandrakasan

15:00 – 15:30

Reconfigurable Nanowire Transistors with Multiple Independent Gates for Efficient and Programmable Combinational Circuits
Jens Trommer, André Heinzig, Tim Baldauf, Thomas Mikolajick, Walter M. Weber, Michael Raitza and Marcus Völp

15:30 – 16:00

Exploiting Inherent Characteristics of Reversible Circuits for Faster Combinational Equivalence Checking
Luca Amarú, Pierre-Emmanuel Gaillardon, Robert Wille and Giovanni De Micheli

Session TitleTiming Analysis and Measurement
Session Code / Room3.6 / Konferenz 4
Date / TimeTuesday, 15 March 2016 / 14:30 – 16:00
ChairMarko Bertogna, Università di Modena e Reggio Emilia, IT
Co-ChairDamien Hardy, University of Rennes 1/IRISA, FR

14:30 – 15:00

Conservative Modeling of Shared Resource Contention for Dependent Tasks in Partitioned Multi-Core Systems
Junchul Choi, Donghyun Kang and Soonhoi Ha

15:00 – 15:30

Formal Worst-Case Timing Analysis of Ethernet TSN’s Burst-Limiting Shaper
Daniel Thiele and Rolf Ernst

15:30 – 15:45

Real-Time Analysis of Engine Control Applications with Speed Estimation
Alessandro Biondi and Giorgio Buttazzo

15:45 – 16:00

Trace-based Analysis Methodology of Program Flash Contention in Embedded Multicore Systems
Lin Li and Albrecht Mayer

Session TitleDealing with Runtime Failures
Session Code / Room3.7 / Konferenz 5
Date / TimeTuesday, 15 March 2016 / 14:30 – 16:00
ChairLorena Anghel, TIMA Laboratory, FR
Co-ChairMichel Renovell, LIRMM, FR

14:30 – 15:00

A Cross-Layer Analysis of Soft Error, Aging and Process Variation in Near Threshold Computing
Anteneh Gebregiorgis, Saman Kiamehr, Fabian Oboril, Rajendra Bishnoi and Mehdi B. Tahoori

15:00 – 15:30

Fast-yet-accurate Variation-Aware Current and Voltage Modelling of Radiation-Induced Transient Fault
Hsuan-Ming (Ryan) Huang, Yuwen (Dave) Lin and Charles H.-P. Wen

15:30 – 15:45

A Detailed Methodology to Compute Soft Error Rates in Advanced Technologies
Marc Riera, Ramon Canal, Jaume Abella and Antonio Gonzalez

15:45 – 16:00

Analysis of NBTI Effects on High Frequency Digital Circuits
Ahmet Unutulmaz, Domenik Helms, Reef Eilers, Malte Metzdorf, Ben Kaczer and Wolfgang Nebel

Session TitleInteractive Presentations
Session Code / RoomIP1
Date / TimeTuesday, 15 March 2016 / 16:00 – 16:30


A Scalable Lane Detection Algorithm on COTSs with OpenCL
Kai Huang, Biao Hu, Jan Botsch, Nikhil Madduri and Alois Knoll


Simulation of Falling Rain for Robustness Testing of Video-Based Surround Sensing Systems
Dennis Hospach, Stefan Mueller, Wolfgang Rosenstiel and Oliver Bringmann


Proposal for Fast Directional Energy Interchange Used in MCMC-Based Autonomous Decentralized Mechanism toward Resilient Microgrid
Yusuke Sakumoto and Ittetsu Taniguchi


Grid-based Self-Aligned Quadruple Patterning Aware Two Dimensional Routing Pattern
Takeshi Ihara, Toshiyuki Hongo, Atsushi Takahashi and Chikaaki Kodama


Practical ILP-based Routing of Standard Cells
Hsueh-Ju Lu, En-Jang Jang, Ang Lu, Yu Ting Zhang, Yu-He Chang, Chi-Hung Lin and Rung-Bin Lin


A Procedure for Improving the Distribution of Congestion in Global Routing
Daohang Shi, Azadeh Davoodi and Jeffrey Linderoth


Machine Learned Machines: Adaptive Co-optimization of Caches, Cores, and On-chip Network
Rahul Jain, Preeti Ranjan Panda and Sreenivas Subramoney


Improving Performance by Monitoring While Maintaining Worst-Case Guarantees
Syed Md Jakaria Abdullah, Kai Lampka and Wang Yi


Fault Tolerant Non-Volatile Spintronic Flip-Flop
Rajendra Bishnoi, Fabian Oboril and Mehdi B. Tahoori


Towards Automatic Diagnosis of Minority Carriers Propagation Problems in HV/HT Automotive Smart Power ICs
Yasser Moursy, Hao Zou, Ramy Iskander, Pierre Tisserand, Dieu-My Ton, Giuseppe Pasetti, Ehrenfried Seebacher, Alexander Steinmair, Thomas Gneiting and Heidrun Alius


Towards a Highly Reliable SRAM-based PUFs
Elena Ioana Vatajelu, Giorgio Di Natale and Paola Prinetto


Current based PUF Exploiting Random Variations in SRAM Cells
Fengchao Zhang, Shuo Yang, Jim Plusquellic and Swarup Bhunia


Behavioral Modeling of Timing Slack Variation in Digital Circuits Due to Power Supply Noise
Taesik Na and Saibal Mukhopadhyay


Lossless Compression Algorithm Based on Dictionary Coding for Multiple E-Beam Direct Write System
Pei-Chun Lin, Yu-Hsuan Pai, Yu-Hsiang Chiu, Shao-Yuan Fang and Charlie Chung-Ping Chen


PhoNoCMap: an Application Mapping Tool for Photonic Networks-on-Chip
Edoardo Fusella and Alessandro Cilardo


Design of an Efficient Ready Queue for Earliest-Deadline-First (EDF) Scheduler
Risat Mahmud Pathan


RT Level Timing Modeling for Aging Prediction
Nils Koppaetzky, Malte Metzdorf, Reef Eilers, Domenik Helms and Wolfgang Nebel

Session TitleExecutive Track Panel: Trends & Challenges to Ensure Security
Session Code / Room4.1 / Saal 2
Date / TimeTuesday, 15 March 2016 / 17:00 – 18:30
OrganiserYervant Zorian, Synopsys, US

17:00 – 18:30

Mike Borza

17:00 – 18:30

Rob Aitken

17:00 – 18:30

Serge Leef

Session TitleHot Topic: Nanoelectronic Design Tools Addressing Coupled Problems for 3D-IC Integration
Session Code / Room4.2 / Konferenz 6
Date / TimeTuesday, 15 March 2016 / 17:00 – 18:30
OrganisersJan ter Maten, University of Wuppertal, DE
Caren Tischendorf, Humboldt University of Berlin, DE
ChairWim Schoenmaker, Magwel NV, Leuven, BE
Co-ChairCaren Tischendorf, Humboldt University of Berlin, DE

17:00 – 17:22

Fast Time-Domain Simulation for Reliable Fault Detection
Bratislav Tasić, Jos J. Dohmen, Rick Janssen, E. Jan W. ter Maten, Roland Pulch and Theo G. J. Beelen

17:22 – 17:44

Holistic Coupled Field and Circuit Simulation
Wim Schoenmaker, Peter Meuris, Christian Strohm and Caren Tischendorf

17:44 – 18:06

Model Order Reduction for Nanoelectronics Coupled Problems with Many Inputs
N. Banagaaya, L. Feng, W. Schoenmaker, P. Meuris, A. Wieers, R. Gillonz and P. Benner

18:06 – 17:00

Shape Optimization of a Power MOS Device Under Uncertainties
Piotr Putek, Peter Meuris, Roland Pulch, E. Jan W. ter Maten, Michael Günther, Wim Schoenmaker, Frederik Deleu and Aarnout Wieers

Session TitleFirmware Security
Session Code / Room4.3 / Konferenz 1
Date / TimeTuesday, 15 March 2016 / 17:00 – 18:30
ChairNele Mentens, Katholieke Universiteit Leuven, BE
Co-ChairAurelien Francillon, EURECOM, FR

17:00 – 17:30

Practical Evaluation of Code Injection in Encrypted Firmware Updates
Oscar M. Guillen, Dawin Schmidt and Georg Sigl

17:30 – 18:00

Integration of ROP/JOP Monitoring IPs in an ARM-based SoC
Yongje Lee, Jinyong Lee, Ingoo Heo, Dongil Hwang and Yunheung Paek

18:00 – 18:30

Verifying Information Flow Properties of Firmware using Symbolic Execution
Pramod Subramanyan, Sharad Malik, Hareesh Khattri, Abhranil Maiti and Jason Fung

Session TitleSystem-level Energy Management
Session Code / Room4.4 / Konferenz 2
Date / TimeTuesday, 15 March 2016 / 17:00 – 18:30
ChairWilliam Fornaciari, Politecnico di Milano – DEIB, IT
Co-ChairSoontae Kim, KAIST, KR

17:00 – 17:30

Low-Overhead Adaptive Constrast Enhancement and Power Reduction for OLEDs
Daniele Jahier Pagliari, Massimo Poncino and Enrico Macii

17:30 – 18:00

Dynamic Energy Burst Scaling for Transiently Powered Systems
Andres Gomez, Lukas Sigrist, Michele Magno, Luca Benini and Lothar Thiele

18:00 – 17:00

Low-power Multichannel Spectro-temporal Feature Extraction Circuit for Audio Pattern Wake-up
Dinko Oletic, Vedran Bilas, Michele Magno, Norbert Felber and Luca Benini

Session TitleUltra-low Energy Memory Devices
Session Code / Room4.5 / Konferenz 3
Date / TimeTuesday, 15 March 2016 / 17:00 – 18:30
ChairFabien Clermidy, CEA-Leti, FR
Co-ChairWalter Weber, Namlab, DE

17:00 – 17:30

3T-TFET bitcell based TFET-CMOS Hybrid SRAM design for Ultra-Low Power Applications
Navneet Gupta, Adam Makosiej, Andrei Vladimirescu, Amara Amara and Costin Anghel

17:30 – 18:00

Design of Latches and Flip-Flops using Emerging Tunneling Devices
Xunzhao Yin, Behnam Sedighi, Michael Niemier and X. Sharon Hu

18:00 – 17:00

MASC: Ultra-Low Energy Multiple-Access Single-Charge TCAM for Approximate Computing
Mohsen Imani, Shruti Patil and Tajana S. Rosing

Session TitleManaging Muli-Core and Flash Memory
Session Code / Room4.6 / Konferenz 4
Date / TimeTuesday, 15 March 2016 / 17:00 – 18:30
ChairAkash Kumar, Technische Universität Dresden, DE
Co-ChairOlivier Sentiyes, INRIA, FR

17:00 – 17:30

Distributed Fair Scheduling for Many-Cores
Anuj Pathania, Vanchinathan Venkataramani, Muhammad Shafique, Tulika Mitra and Jörg Henkel

17:30 – 18:00

Keep It Slow and in Time: Online DVFS with Hard Real-Time Workloads
Kai Lampka and Björn Forsberg

18:00 – 18:30

Exploiting Process Variation for Retention Induced Refresh Minimization on Flash Memory
Yejia Di, Liang Shi, Kaijie Wu and Chun Jason Xue

Session TitleModeling of Devices and Mixed-Signal Circuits
Session Code / Room4.7 / Konferenz 5
Date / TimeTuesday, 15 March 2016 / 17:00 – 18:30
ChairNuno Horta, Instituto de Telecomunicacoes, PT
Co-ChairJaijeet Roychowdhury, UC Berkeley, US

17:00 – 17:30

Accurate Synthesis of Integrated RF Passive Components Using Surrogate Models
F. Passos, R. González-Echevarría, E. Roca, R. Castro-López and F. V. Fernández

17:30 – 18:00

Implementation and Quality Testing for Compact Models Implemented in Verilog-A
Anindya Mukherjee, Andreas Pawlak, Michael Schroter, Didier Celi and Zoltan Huszka

18:00 – 18:30

Multi-Harmonic Nonlinear Modeling of Low-power PWM DC-DC Converters Operating in CCM and DCM
Ya Wang, Di Gao, Dani A. Tannir and Peng Li

Session TitleSPECIAL DAY Hot Topic: Building Confidence in Advanced Driver Assistance Systems
Session Code / Room5.1 / Saal 2
Date / TimeWednesday, 16 March 2016 / 08:30 – 10:00
OrganiserSamarjit Chakraborty, Technische Universität München (TUM), DE
Wolfgang Ecker, Infineon Technologies, DE
ChairSebastian Steinhorst, TUM CREATE, SG
Co-ChairKai Lampka, Uppsala University, SE

08:30 – 09:00

Availability and Interpretability of Optimal Control for Criticality Estimation in Vehicle Active Safety
Stephan Herrmann and Wolfgang Utschick

09:00 – 10:00

Certification Issues in Automotive Driver Assistance Systems
Udo Steininger

09:30 – 10:00

Deep Learning in Advanced Driver Assistance Systems
Qing Rao

Session TitleHot Topic: In-memory Computing: Status and Trends
Session Code / Room5.2 / Konferenz 6
Date / TimeWednesday, 16 March 2016 / 08:30 – 10:00
OrganiserPierre-Emmanuel Gaillardon, University of Utah, Salt Lake City, US
ChairIan O’Connor, Institute des Nanotechnologies de Lyon, Ecully, FR
Co-ChairMichael Niemier, University of Notre Dame, South Bend, US

08:30 – 08:52

Software and System Co-Optimization in the ERA of Heterogeneous Computing
Ruchir Puri

08:52 – 09:14

Fading Memory Effects in a Memristor for Cellular Nanoscale Network Applications
A. Ascoli, R. Tetzlaff, L. O. Chua, J. P. Strachan and R. S. Williams

09:14 – 09:36

Digital Memcomputing Machines
Massimiliano Di Ventra and Fabio L. Traversa

09:36 – 10:00

The Programmable Logic-in-Memory (PLiM) Computer
Pierre-Emmanuel Gaillardon, Luca Amarú, Anne Siemon, Eike Linn, Rainer Waser, Anupam Chattopadhyay and Giovanni De Micheli

Session TitlePhysical Attacks and Countermeasures
Session Code / Room5.3 / Konferenz 1
Date / TimeWednesday, 16 March 2016 / 08:30 – 10:00
ChairAssia Tria, CEA-Leti, FR
Co-ChairFrancesco Regazzoni, ALaRI, CH

08:30 – 09:00

Oracle-Guided Incremental SAT Solving to Reverse Engineer Camouflaged Logic Circuits
Duo Liu, Cunxi Yu, Xiangyu Zhang and Daniel Holcomb

09:00 – 09:30

A Fully-Digital EM Pulse Detector
David El-Baze, Jean-Baptiste Rigaud and Philippe Maurine

09:30 – 10:00

On the Development of a New Countermeasure Based on a Laser Attack RTL Fault Model
Charalampos Ananiadis, Athanasios Papadimitriou, David Hély, Vincent Beroulle, Paolo Maistri and Régis Leveugle

Session TitleArchitectural-level Low-power Design
Session Code / Room5.4 / Konferenz 2
Date / TimeWednesday, 16 March 2016 / 08:30 – 10:00
ChairAlberto Macii, Politecnico di Torino, IT
Co-ChairPascal Vivet, CEA LETI, FR

08:30 – 09:00

Multi-Story Power Distribution Networks for GPUs
Qixiang Zhang, Liangzhen Lai, Mark Gottscho and Puneet Gupta

09:00 – 09:30

Energy-Efficient Cache Memories using a Dual-V t 4T SRAM Cell with Read-Assist Techniques
Alireza Shafaei and Massoud Pedram

09:30 – 10:00

Learning-Based Dynamic Reliability Management For Dark Silicon Processor Considering EM Effects
Taeyoung Kim, Xin Huang, Hai-Bao Chen, Valeriy Sukharev and Sheldon X.-D. Tan

Session TitleAlternative Computing Models
Session Code / Room5.5 / Konferenz 3
Date / TimeWednesday, 16 March 2016 / 08:30 – 10:00
ChairYiyu Shi, University of Notre Dame, US
Co-ChairSébastien Le Beux, Ecole Centrale de Lyon, FR

08:30 – 09:00

MNSIM: Simulation Platform for Memristor-based Neuromorphic Computing System
Lixue Xia, Boxun Li, Tianqi Tang, Peng Gu, Xiling Yin, Wenqin Huangfu, Pai-Yu Chen, Shimeng Yu, Yu Cao, Yu Wang, Yuan Xie and Huazhong Yang

09:00 – 09:30

Conditional Deep Learning for Energy-Efficient and Enhanced Pattern Recognition
Priyadarshini Panda, Abhronil Sengupta and Kaushik Roy

09:30 – 10:00

Probabilistic Error Models for Machine Learning Kernels Implemented on Stochastic Nanoscale Fabrics
Sai Zhang and Naresh R. Shanbhag

Session TitleEfficient System Modeling with SystemC
Session Code / Room5.6 / Konferenz 4
Date / TimeWednesday, 16 March 2016 / 08:30 – 10:00
ChairGunar Schirner, Northeastern University, US
Co-ChairChristian Haubelt, University of Rostock, DE

08:30 – 09:00

A New Parallel SystemC Kernel Leveraging Manycore Architectures
Nicolas Ventroux and Tanguy Sassolas

09:00 – 09:30

SystemC-Link: Parallel SystemC Simulation using Time-Decoupled Segments
Jan Henrik Weinstock, Rainer Leupers, Gerd Ascheid, Dietmar Petras and Andreas Hoffmann

09:30 – 10:00

Orthogonal Signal Modeling and Operational Computation of AMS Circuits for Fast and Accurate System Simulation
Leandro Gil and Martin Radetzki

Session TitleRF, Power Converters, and ADC: Innovative Design and Test Solutions
Session Code / Room5.7 / Konferenz 5
Date / TimeWednesday, 16 March 2016 / 08:30 – 10:00
ChairMarie-Minerve Louerat, Université Pierre & Marie Curie, (UPMC - Paris 6), FR
Co-ChairChristoph Grimm, University of Kaiserslautern, DE

08:30 – 09:00

Built-in Test of Millimeter-Wave Circuits Based on Non-Intrusive Sensors
Athanasios Dimakos, Haralampos-G. Stratigopoulos, Alexandre Siligaris, Salvador Mir and Emeric De Foucauld

09:00 – 09:30

Adaptive Delay Monitoring for Wide Voltage-Range Operation
Jongho Kim, Gunhee Lee, Kiyoung Choi, Yonghwan Kim, Wook Kim, Kyungtae Do and Jungyun Choi

09:30 – 10:00

Analytical Design Optimization of Sub-ranging ADC Based on Stochastic Comparator
Md. Maruf Hossain, Tetsuya Iizuka, Toru Nakura and Kunihiro Asada

Session TitleInteractive Presentations
Session Code / RoomIP2
Date / TimeWednesday, 16 March 2016 / 10:00 – 10:30


Analyzing the Impact of Injected Sensor Data on an Advanced Driver Assistance System using the OP2 TIMUS Prototyping Platform
Alexander Stühring, Günter Ehmen and Sibylle Fröschle


Hardware Trojans in Incompletely Specified On-chip Bus Systems
Nicole Fern, Ismail San, Çetin Kaya Koç and Kwang-Ting (Tim) Cheng


Workload-aware Power Optimization Strategy for Asymmetric Multiprocessors
E. Del Sozzo, G. C. Durelli, E. M. G. Trainiti, A. Miele, M. D. Santambrogio and C. Bolchini


The Slowdown or Race-to-idle Question: Workload-Aware Energy Optimization of SMT Multicore Platforms under Process Variation
Anup Das, Geoff V. Merrett and Bashir M. Al-Hashimi


Towards General Purpose Computations on Low-End Mobile GPUs
Matina Maria Trompouki and Leonidas Kosmidis


Estimating Delay Differences of Arbiter PUFs Using Silicon Data
S. V. Sandeep Avvaru, Chen Zhou, Saroj Satapathy, Yingjie Lao, Chris H. Kim and Keshab K. Parhi


On the Use of Forward Body Biasing to Decrease the Repeatability of Laser-Induced Faults
Marc Lacruche, Noemie Beringuier-Boher, Jean-Max Dutertre, Jean-Baptiste Rigaud and Edith Kussener


Sequential Analysis Driven Reset Optimization to Improve Power, Area and Routability
Srihari Yechangunja, Raj Shekhar, Mohit Kumar, Nikhil Tripathi, Abhishek Mittal, Abhishek Ranjan, Jianfeng Liu, Minyoung Mo, Kyungtae Do, Jung Yun Choi and SungHo Park


Efficient Global Optimization of MEMS Based on Surrogate Model Assisted Evolutionary Algorithm
Bo Liua and Anna Nikolaeva


Efficient Monitoring of Loose-Ordering Properties for SystemC/TLM
Yuliia Romenska and Florence Maraninchi


Testable Design of Repeaterless Low Swing On-Chip Interconnect
K. Naveen and Dinesh K. Sharma


ll-digital Hybrid-control Buck Converter for Integrated Voltage Regulator Applications
Ta-Tung Yen, Bin Yu, Visvesh S. Sathe

Session TitleSPECIAL DAY Hot Topic: Formal Methods for Automotive Software
Session Code / Room6.1 / Saal 2
Date / TimeWednesday, 16 March 2016 / 11:00 – 12:30
ChairMarc Geilen, Eindhoven University of Technology, NL
Co-ChairWolfgang Ecker, Infineon Technologies, DE

11:00 – 11:30

Requirements Engineering for Software-Intensive Automotive Embedded Systems
Manfred Broy

11:30 – 12:00

Formal Specification and Verification of Automotive Software in Practice
Ravindra Metta

12:00 – 12:30

Timing Analysis of Automotive Architectures and Software
Nicolas Navet

Session TitlePanel: Looking Backwards and Forwards
Session Code / Room6.2 / Konferenz 6
Date / TimeWednesday, 16 March 2016 / 11:00 – 12:30
OrganiserMarco Casale-Rossi, Synopsys, US
ChairMarco Casale-Rossi, Synopsys, US
Co-ChairGiovanni De Micheli, EPFL, CH

11:00 – 12:30

Panel: Looking Backwards and Forwards
Marco Casale-Rossi, Giovanni De Micheli, Antun Domic, Enrico Macii, Domenico Rossi and Joe Sawicki

11:00 – 12:30

Enrico Macii

11:00 – 12:30

Antun Domic

11:00 – 12:30

Domenico Rossi

11:00 – 12:30

Joseph Sawicki

11:00 – 12:30

Giovanni De Micheli

Session TitleAnti-aging and Error protection using Checkpointing and DVFS
Session Code / Room6.3 / Konferenz 1
Date / TimeWednesday, 16 March 2016 / 11:00 – 12:30
ChairAntonio Rosario Miele, Polimi, IT
Co-ChairJose L. Ayala, Complutense University of Madrid, ES

11:00 – 11:30

Aging-Aware Voltage Scaling
Victor M. van Santen, Hussam Amrouch, Narendra Parihar, Souvik Mahapatra and Jörg Henkel

11:30 – 12:00

RECORD: Reducing Register Traffic for Checkpointing in Embedded Processors
Tuo Li, Jude Angelo Ambrose and Sri Parameswaran

12:00 – 12:15

Error Resilience and Energy Efficiency: An LDPC Decoder Design Study
Philipp Schläfer, Chu-Hsiang Huang, Clayton Schoeny, Christian Weis, Yao Li, Norbert Wehn and Lara Dolecek

12:15 – 12:30

Runtime Interval Optimization and Dependable Performance for Application-Level Checkpointing
Apostolos Kokolis, Alexandros Mavrogiannis, Dimitrios Rodopoulos, Christos Strydis and Dimitrios Soudris

Session TitlePower Modeling and Power Aware Synthesis
Session Code / Room6.4 / Konferenz 2
Date / TimeWednesday, 16 March 2016 / 11:00 – 12:30
ChairAlberto Garcia Ortiz, University of Bremen, DE
Co-ChairQi Zhu, UCR, US

11:00 – 11:30

A Systematic Approach to Automated Construction of Power Emulation Models
Benjamin A. Bjørnseth, Asbjørn Djupdal and Lasse Natvig

11:30 – 12:00

Automatic Generation of Power State Machines through Dynamic Mining of Temporal Assertions
Alessandro Danese, Graziano Pravadelli and Ivan Zandonà

12:00 – 12:30

Approximation through Logic Isolation for the Design of Quality Configurable Circuits
Shubham Jain, Swagath Venkataramani and Anand Raghunathan

Session TitleBiochips
Session Code / Room6.5 / Konferenz 3
Date / TimeWednesday, 16 March 2016 / 11:00 – 12:30
ChairRobert Wille, JKU, AT
Co-ChairIan O’Connor, Ecole Centrale de Lyon, FR

11:00 – 11:30

Architecture Synthesis for Cost-Constrained Fault-Tolerant Flow-based Biochips
Morten Chabert Eskesen, Paul Pop and Seetal Potluri

11:30 – 12:00

Sieve-valve-aware Synthesis of Flow-based Microfluidic Biochips Considering Specific Biological Execution Limitations
Mengchu Li, Tsun-Ming Tseng, Bing Li, Tsung-Yi Ho and Ulf Schlichtmann

12:00 – 12:30

Integrated and Real-Time Quantitative Analysis Using Cyberphysical Digital-Microfluidic Biochips
Mohamed Ibrahim, Krishnendu Chakrabarty and Kristin Scott

Session TitleModelling and Control of Cyber-Physical Systems
Session Code / Room6.6 / Konferenz 4
Date / TimeWednesday, 16 March 2016 / 11:00 – 12:30
ChairDonatella Sciuto, Politecnico di Milano, IT
Co-ChairPaul Pop, Technical University of Denmark, DK

11:00 – 11:30

Self-Triggered Controllers and Hard Real-Time Guarantees
Amir Aminifar, Paulo Tabuada, Petru Eles and Zebo Peng

11:30 – 12:00

A Spatio-Temporal Fractal Model for a CPS Approach to Brain-Machine-Body Interfaces
Yuankun Xue, Saul Rodriguez and Paul Bogdan

12:00 – 12:15

Modular Code Generation for Emulating the Electrical Conduction System of the Human Heart
Nathan Allen, Sidharta Andalam, Partha Roop, Avinash Malik, Mark Trew and Nitish Patel

12:15 – 12:30

Resource Utilization and Quality-of-Control Trade-off for a Composable Platform
Juan Valencia, E.P. (Eelco) van Horssen, Dip Goswami, W. P. M. H. (Maurice) Heemels and Kees Goossens

Session TitleFault Tolerant Systems and Methods
Session Code / Room6.7 / Konferenz 5
Date / TimeWednesday, 16 March 2016 / 11:00 – 12:30
ChairViacheslav Izosimov, Semcon Sweden AB, SE
Co-ChairZebo Peng, Linköping University, SE

11:00 – 11:30

Inexact Designs for Approximate Low Power Addition by Cell Replacement
Haider A. F. Almurib, T. Nandha Kumar and Fabrizio Lombardi

11:30 – 12:00

A General Approach for Highly Defect Tolerant Parallel Prefix Adder Design
Soumya Banerjee and Wenjing Rao

12:00 – 12:30

Inverters’ Self-Checking Monitors for Reliable Photovoltaic Systems
M. Omaña, A. Fiore and C. Metra

SessionLunch Time Keynote Session
Session Code / Room7.0
Date / TimeWednesday, 16 March 2016 / 14:00 – 14:30
ChairLuca Fanucci, University of Pisa, IT
Co-ChairWolfgang Ecker, Infineon Technologies, DE

14:00 – 14:30

[Keynote] The Car of the Future will reinvent personal mobility
Patrick Leteinturier

Session TitleSPECIAL DAY Panel: Which EDA Solutions can the Automotive Domain Reuse? Very Few or All?
Session Code / Room7.1 / Saal 2
Date / TimeWednesday, 16 March 2016 / 14:30 – 16:00
ChairAdam Morawiec, European Chips & Systems Design Initiative (ESCI), FR

14:30 – 16:00

Rainer Kress

14:30 – 16:00

Gabriele Ernst

14:30 – 16:00

Jean-Marie Saint-Paul

14:30 – 16:00

Silvano Motto

14:30 – 16:00

Christoph Störmer

14:30 – 16:00

Oliver Bringmann

Session TitleEU Projects Special Session: Energy Efficiency drives Design
Session Code / Room7.2 / Konferenz 6
Date / TimeWednesday, 16 March 2016 / 14:30 – 16:00
OrganiserRoberto Giorgi, University of Siena, IT
ChairMartin Schoeberl, Technical University of Denmark, DK
Co-ChairRoberto Giorgi, University of Siena, IT

14:30 – 14:45

EUROSERVER: Share-Anything Scale-Out Micro-Server Design
Manolis Marazakis, John Goodacre, Didier Fuin, Paul Carpenter, John Thomson, Emil Matus, Antimo Bruno, Per Stenstrom, Jerome Martin, Yves Durand and Isabelle Dor

14:45 – 15:00

Energy Minimization at All Layers of the Data Center: The ParaDIME Project
Oscar Palomar, Santhosh Rethinagiri, Gulay Yalcin, Ruben Titos-Gil, Pablo Prieto, Emma Torrella, Osman Unsal, Adrian Cristal, Pascal Felber, Anita Sobe, Yaroslav Hayduk, Mascha Kurpicz, Christof Fetzer, Thomas Knauth, Malte Schneegaß, Jens Struckmeier and Dragomir Milojevic

15:00 – 15:15

Rack-scale Disaggregated Cloud Data Centers: The dReDBox Project Vision
K. Katrinis, D. Syrivelis, D. Pnevmatikatos, G. Zervas, D. Theodoropoulos, I. Koutsopoulos, K. Hasharoni, D. Raho, C. Pinto, F. Espina, S. Lopez-Buedo, Q. Chen, M. Nemirovsky, D. Roca, H. Klos and T. Berends

15:15 – 15:30

ECOSCALE: Reconfigurable Computing and Runtime System for Future Exascale Systems
Iakovos Mavroidis, Ioannis Papaefstathiou, Luciano Lavagno, Dimitrios S. Nikolopoulos, Dirk Koch, John Goodacre, Ioannis Sourdis, Vassilis Papaefstathiou, Marcello Coppola and Manuel Palomino

15:30 – 15:45

Enabling HPC for QoS-sensitive Applications: The MANGO Approach
José Flich, Giovanni Agosta, Philipp Ampletzerz, David Atienza Alonso, Carlo Brandolese, Alessandro Cilardo, William Fornaciari, Ynse Hoornenborg, Mario Kovac, Bruno Maitre, Giuseppe Massari, Hrvoje Mlinarić, Ermis Papastefanakis, Fabrice Roudet, Rafael Tornero and Davide Zoni

15:45 – 16:00

AutoTuning and Adaptivity appRoach for Energy Efficient eXascale HPC Systems: The ANTAREX Approach
Cristina Silvano, Giovanni Agosta, Andrea Bartolini, Andrea R. Beccari, Luca Benini, João Bispo, Radim Cmar, João M. P. Cardoso, Carlo Cavazzoni, Jan Martinovic, Gianluca Palermo, Martin Palkovic, Pedro Pinto, Erven Rohou, Nico Sanna and Katerina Slaninová

Session TitleLow Power Devices and Methods for Healthcare and Assisted Living
Session Code / Room7.3 / Konferenz 1
Date / TimeWednesday, 16 March 2016 / 14:30 – 16:00
ChairJosé M. Moya, Technical University of Madrid, ES
Co-ChairGiovanni Ansaloni, University of Lugano, CH

14:30 – 15:00

A Digital Processor Architecture for Combined EEG/EMG Falling Risk Prediction
V. F. Annese, M. Crepaldi, D. Demarchi and D. De Venuto

15:00 – 15:30

Distributed-neuron-network based Machine Learning on Smart-gateway Network Towards Real-time Indoor Data Analytics
Hantao Huang, Yuehua Cai and Hao Yu

15:30 – 15:45

Touch-Based System for Beat-to-Beat Impedance Cardiogram Acquisition and Hemodynamic Parameters Estimation
Dionisije Sopic, Srinivasan Murali, Francisco Rincón and David Atienza

15:45 – 16:00

Quantifying the Benefits of Compressed Sensing on a WBSN-based Real-Time Biosignal Monitor
Daniele Bortolotti, Bojan Milosevic, Andrea Bartoliniy, Elisabetta Farellaand Luca Benini

Session TitleSystem-Level Synthesis
Session Code / Room7.4 / Konferenz 2
Date / TimeWednesday, 16 March 2016 / 14:30 – 16:00
ChairCathal McCabe, Xilinx, Inc. Ireland, IE
Co-ChairYuichi Nakamura, NEC Japan, JP

14:30 – 15:00

System Level Synthesis for Virtual Memory Enabled Hardware Threads
Nicolas Estibals, Gaël Deest, Ali Hassan El Moussawi and Steven Derrien

15:00 – 15:30

Composable, Parameterizable Templates for High-Level Synthesis
Janarbek Matai, Dajung Lee, Alric Althoff and Ryan Kastner

15:30 – 16:00

Leveraging Power Spectral Density for Scalable System-Level Accuracy Evaluation
Benjamin Barrois, Karthick Parashar and Olivier Sentieys

Session TitleEmerging Memory Architectures
Session Code / Room7.5 / Konferenz 3
Date / TimeWednesday, 16 March 2016 / 14:30 – 16:00
ChairAmara Amara, ISEP, FR
Co-ChairFabian Oboril, Karlsruhe Institute of Technology, DE

14:30 – 15:00

Leader: Accelerating ReRAM-based Main Memory by Leveraging Access Latency Discrepancy in Crossbar Arrays
Hang Zhang, Nong Xiao, Fang Liu and Zhiguang Chen

15:00 – 15:30

Sliding Basket: An Adaptive ECC Scheme for Runtime Write Failure Suppression of STT-RAM Cache*
Xue Wang, Mengjie Mao, Enes Eken, Wujie Wen, Hai Li and Yiran Chen

15:30 – 16:00

Exploiting More Parallelism from Write Operations on PCM
Zheng Li, Fang Wang, Yu Hua, Wei Tong, Jingning Liu, Yu Chen and Dan Feng

Session TitleStatistical and Symbolic Techniques for the Analysis and Testing of Embedded Software
Session Code / Room7.6 / Konferenz 4
Date / TimeWednesday, 16 March 2016 / 14:30 – 16:00
ChairJian-Jia Chen, Technische Universität Dortmund, DE
Co-ChairPetru Eles, Linköping University, SE

14:30 – 15:00

Dynamic Partitioning Strategy to Enhance Symbolic Execution
Brendan A. Marcellino and Michael S. Hsiao

15:00 – 15:30

Quantitative Timing Analysis of UML Activity Diagrams Using Statistical Model Checking
Fan Gu, Xinqian Zhang, Mingsong Chen, Daniel Große and Rolf Drechsler

15:30 – 16:00

Integrating Symbolic and Statistical Methods for Testing Intelligent Systems Applications to Machine Learning and Computer Vision
Arvind Ramanathan, Laura L. Pullum, Faraz Hussain, Dwaipayan Chakrabarty and Sumit Kumar Jha

Session TitleAging Mitigation to Improve System Robustness
Session Code / Room7.7 / Konferenz 5
Date / TimeWednesday, 16 March 2016 / 14:30 – 16:00
ChairMaria Michael, University of Cyprus, CY
Co-ChairCarles Hernandez, Barcellona Supercomputer Center, ES

14:30 – 15:00

Path Selection and Sensor Insertion Flow for Age Monitoring in FPGAs
Mohammad Ebrahimi, Zana Ghaderi, Eli Bozorgzadeh and Zain Navabi

15:00 – 15:30

Design and Evaluation of Reliability-oriented Task Re-Mapping in MOSoCs using Time-Series Analysis of Intermittent Faults
Siva Satyendra Sahoo, Akash Kumar and Bharadwaj Veeravalli

15:30 – 16:00

Lifetime-aware Load Distribution Policies in Multi-core Systems: An In-depth Analysis
Cristiana Bolchini, Luca Cassano and Antonio Miele

Session TitleInteractive Presentations
Session Code / RoomIP3
Date / TimeWednesday, 16 March 2016 / 16:00 – 16:30


A Flexible Inexact TMR Technique for SRAM-based FPGAs
Shyamsundar Venkataraman, Rui Santos and Akash Kumar


Accurate Verification of RC Power Grids
Mohammad Fawaz and Farid N. Najm


Security-Aware Development of Cyber-Physical Systems Illustrated with Automotive Case Study
Viacheslav Izosimov, Alexandros Asvestopoulos, Oscar Blomkvist and Martin Törngren


Online Heuristic for the Multi-objective Generalized Traveling Salesman Problem
Joost van Pinxten, Marc Geilen, Twan Basten, Umar Waqas and Lou Somers


Towards Low Overhead Control Flow Checking Using Regular Structured Control
Zhiqi Zhu and Joseph Callenes-Sloan


Emulation-Based Hierarchical Fault-Injection Framework for Coarse-to-Fine Vulnerability Analysis of Hardware-Accelerated Approximate Algorithms
Ioannis Chadjiminas, Ioannis Savva, Christos Kyrkou, Maria K. Michael and Theocharis Theocharides


Technology Transfer in Computing Systems: The TETRACOM Approach
Rainer Leupers


Energy vs. Reliability Trade-offs Exploration in Biomedical Ultra-Low Power Devices
Loris Duch, P. Garcia del Valle, Shrikanth Ganapathy, Andreas Burg and David Atienza


A Machine Learning Approach for Medication Adherence Monitoring Using Body-Worn Sensors
Niloofar Hezarjaribi, Ramin Fallahzadeh and Hassan Ghasemzadeh


Requirements-Centric Closed-Loop Validation of Implantable Cardiac Devices
Weiwei Ai, Nitish Patel and Partha Roop


Low Normalized Energy Derivation Asynchronous Circuit Synthesis Flow through Fork-Join Slack Matching for Cryptographic Applications
Nan Liu, Kwen-Siong Chong, Weng-Geng Ho, Bah-Hwee Gwee and Joseph S. Chang


A Lifetime-Aware Runtime Mapping Approach for Many-core Systems in the Dark Silicon Era
Mohammad-Hashem Haghbayan, Antonio Miele, Amir M. Rahmani, Pasi Liljeberg and Hannu Tenhunen

Session TitleSPECIAL DAY Hot Topic: Connectivity in the Automotive Domain: From Micro to Macro
Session Code / Room8.1 / Saal 2
Date / TimeWednesday, 16 March 2016 / 17:00 – 18:30
ChairHenk Corporaal, Eindhoven University of Technology, NL
Co-ChairSamarjit Chakraborty, Technische Universität München (TUM), DE

17:00 – 17:30

Automotive V2X on Phones: Enabling Next-generation Mobile ITS Apps
Jason H. Gao and Li-Shiuan Peh

17:30 – 18:00

EDA for automotive cabling
Thomas Heurung, Mentor, DE

18:00 – 18:30

Deterministic Ethernet in Automotive Applications
Astrit Ademaj, TTTech Computertechnik AG, AT

Session TitleEU Projects Special Session: Towards Better EU-projects – Success Stories
Session Code / Room8.2 / Konferenz 6
Date / TimeWednesday, 16 March 2016 / 17:00 – 18:30
OrganiserRoberto Giorgi, University of Siena, IT
ChairCristina Silvano, Politecnico of Milan, IT
Co-ChairRoberto Giorgi, University of Siena, IT

17:00 – 17:15

Collective Knowledge: Towards R&D Sustainability
Grigori Fursin, Anton Lokhmotov and Ed Plowman

17:15 – 17:30

Lessons Learned from the EU Project T-CREST
Martin Schoeberl

17:30 – 17:45

MULTI-POS: Marie Curie Network in Multi-technology Positioning
Jari Nurmi and Elena-Simona Lohan

17:45 – 18:00

Program Transformations in the POLCA Project
Jan Kuper, Lutz Schubert, Kilian Kempf, Colin Glass, Daniel Rubio Bonilla and Manuel Carro

18:00 – 18:15

Computation and Communication Challenges to Deploy Robots in Assisted Living Environments
Georgios Keramidas, Christos Antonopoulos, Nikolaos S. Voros, Fynn Schwiegelshohn, Philipp Wehner, Jens Rettkowski, Diana Göhringer, Michael Hübner, Stasinos Konstantopoulos, Theodore Giannakopoulos, Vangelis Karkaletsis and Vaggelis Mariatos

18:15 – 18:30

ATHENIS_3D: Automotive Tested High-voltage and Embedded Non-volatile Integrated SoC Platform with 3D Technology
E. Wachmann, S. Saponara, C. Zambelli, P. Tisserand, J. Charbonnier, T. Erlbacher, S. Gruenler, C. Hartler, J. Siegert, P. Chassard, D. M. Ton, L. Ferrari and L. Fanucci

Session TitleHot Topic: Managing Heterogeneous Computing Resources at Runtime
Session Code / Room8.3 / Konferenz 1
Date / TimeWednesday, 16 March 2016 / 17:00 – 18:30
OrganisersChristian Plessl, University of Paderborn, DE
David Andrews, University of Arkansas, US
ChairDaniel Ziener, Hamburg University of Technology, DE
Co-ChairJosé L. Ayala, Complutense University of Madrid, ES

17:00 – 17:30

Run Time Interpretation for Creating Custom Accelerators
Sen Ma, Zeyad Aklah and David Andrews

17:30 – 18:00

A Self-Adaptive Approach to Efficiently Manage Energy and Performance in Tomorrow’s Heterogeneous Computing Systems
E. M. G. Trainiti, G. C. Durelli, A. Miele, C. Bolchini and M. D. Santambrogio

18:00 – 18:30

Performance-Centric Scheduling with Task Migration for a Heterogeneous Compute Node in the Data Center
Achim Lösch, Tobias Beisel, Tobias Kenter, Christian Plessl and Marco Platzner

Session TitleAdvanced Methods in High-Level Design
Session Code / Room8.4 / Konferenz 2
Date / TimeWednesday, 16 March 2016 / 17:00 – 18:30
ChairFabian Oboril, KIT Germany, DE
Co-ChairLuciano Lavagno, Politecnico di Torino, IT

17:00 – 17:30

Adaptive Threshold Non-Pareto Elimination: Re-thinking Machine Learning for System Level Design Space Exploration on FPGAs
Pingfan Meng, Alric Althoff, Quentin Gautier and Ryan Kastner

17:30 – 18:00

Monitoring of MTL Specifications With IBM’s Spiking-Neuron Model
Konstantin Selyunin, Thang Nguyen, Ezio Bartocci, Dejan Nickovic and Radu Grosu

18:00 – 18:30

Formal Probabilistic Analysis of Distributed Resource Management Schemes in On-Chip Systems
Shafaq Iqtedar, Osman Hasan, Muhammad Shafique and Jörg Henkel

Session TitleNon-volatile Memory Design Methodologies
Session Code / Room8.5 / Konferenz 3
Date / TimeWednesday, 16 March 2016 / 17:00 – 18:30
ChairMichael Huebner, RUB, DE
Co-ChairMichael Niemier, University of Notre Dame, US

17:00 – 17:30

An Operating System Level Data Migration Scheme in Hybrid DRAM-NVM Memory Architecture
Reza Salkhordeh and Hossein Asadi

17:30 – 18:00

Unified DRAM and NVM Hybrid Buffer Cache Architecture for Reducing Journaling Overhead
Zhiyong Zhang, Lei Ju and Zhiping Jia

18:00 – 18:30

Fast Logic Synthesis for RRAM-based In-Memory Computing using Majority-Inverter Graphs
Saeideh Shirinzadeh, Mathias Soeken, Pierre-Emmanuel Gaillardon and Rolf Drechsler

Session TitleDataflow Modeling and Natural Language Processing
Session Code / Room8.6 / Konferenz 4
Date / TimeWednesday, 16 March 2016 / 17:00 – 18:30
ChairDominique Borrione, Laboratoire TIMA, FR
Co-ChairMarc Geilen, Eindhoven University of Technology, NL

17:00 – 17:30

Exploiting Resource-constrained Parallelism in Hard Real-Time Streaming Applications
Jelena Spasic, Di Liu and Todor Stefanov

17:30 – 18:00

Transaction Parameterized Dataflow: A Model for Context-Dependent Streaming Applications
Xuan Khanh Do, Stephane Louise and Albert Cohen

18:00 – 18:30

GLAsT: Learning Formal Grammars to Translate Natural Language Specifications into Hardware Assertions
Christopher B. Harris and Ian G. Harris

Session TitleTest Methods Handling Unkowns, 2.50 Integration and Realistic Memory Defects
Session Code / Room8.7 / Konferenz 5
Date / TimeWednesday, 16 March 2016 / 17:00 – 18:30
ChairFriedrich Hapke, Mentor Graphics Hamburg, DE

17:00 – 17:30

Accurate CEGAR-based ATPG in Presence of Unknown Values for Large Industrial Designs
Karsten Scheibler, Dominik Erb and Bernd Becker

17:30 – 18:00

Pre-Bond Testing of the Silicon Interposer in 2.5D ICs
Ran Wang, Zipeng Li, Sukeshwar Kannan and Krishnendu Chakrabarty

18:00 – 18:30

Improving SRAM Test Quality by Leveraging Self-timed Circuits
Josef Kinseher, Leonardo B. Zordan, Ilia Polian and Andreas Leininger

Session TitleSPECIAL DAY Embedded Tutorial: Embedded Systems Security
Session Code / Room9.1 / Saal 2
Date / TimeThursday, 17 March 2016 / 08:30 – 10:00
ChairMatthias Schunter, Intel, DE
Co-ChairWieland Fischer, Infineon Technologies, DE

08:30 – 10:00

Software Security: Vulnerabilities and Countermeasures for Two Attacker Models
Frank Piessens and Ingrid Verbauwhede

Session TitleManaging the Traffic Jam in NoC
Session Code / Room9.2 / Konferenz 6
Date / TimeThursday, 17 March 2016 / 08:30 – 10:00
ChairNader Bagherzadeh, University of California Irvine, US
Co-ChairMassoud Daneshtalab, KTH, SE

08:30 – 09:00

OLITS: An Ohm’s Law-like Traffic Splitting Model Based on Congestion Prediction
Gaoming Du, Yanghao Ou, Xiangyang Li, Ping Song, Zhonghai Lu and Minglun Gao

09:00 – 09:30

MCAPI-compliant Hardware Buffer Manager Mechanism to Support Communication in Multi-Core Architectures
Thiago Raupp da Rosa, Thomas Mesquida, Romain Lemaire and Fabien Clermidy

09:30 – 10:00

Slack-Based Resource Arbitration for Real-Time Networks-On-Chip
Adam Kostrzewa, Selma Saidi and Rolf Ernst

Session TitleIndustrial Experiences
Session Code / Room9.3 / Konferenz 1
Date / TimeThursday, 17 March 2016 / 08:30 – 10:00
ChairNorbert Wehn, University of Kaiserslautern, DE
Co-ChairStephan Diestelhorst, ARM, US

08:30 – 08:45

Challenges of Using On-Chip Performance Monitors for Process and Environmental Variation Compensation
Mahroo Zandrahimi, Zaid Al-Ars, Philippe Debaudand Armand Castillejo

08:45 – 09:00

Study of Workload Impact on BTI HCI Induced Aging of Digital Circuits
Ajith Sivadasan, Florian Cacho, Sidi Ahmed Benhassain, Vincent Huard and Lorena Anghel

09:00 – 09:15

Fast Prototyping Platform for Navigation Systems with Sensors Fusion
Charly Bechara, Karim Ben Chehida, Mickael Guibert, Renaud Schmit, Maria Lepecq, Laurent Soulier, Thomas Dombek and Yann Leclerc

09:15 – 09:30

Precision Timed Industrial Automation Systems
Matthew M. Y. Kuo, Sidharta Andalam and Partha S. Roop

09:30 – 09:45

AUTOSAR-based Communication Coprocessor for Automotive ECUs
Ahmed Hamed, Mona Safar, M. Watheq El-Kharashiand Ashraf Salem

09:45 – 10:00

Mantissa-Masking for Energy-Efficient Floating-Point LTE Uplink MIMO Baseband Processing
D. Guenther, T. Henriksson, R. Leupers, G. Ascheid

Session TitleOptimization for Logic and Physical Design
Session Code / Room9.4 / Konferenz 2
Date / TimeThursday, 17 March 2016 / 08:30 – 10:00
ChairValeria Bertacco, Univ. of Michigan, US
Co-ChairSven Peyer, IBM, DE

08:30 – 09:00

Optimizing Majority-Inverter Graphs With Functional Hashing
Mathias Soeken, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon and Giovanni De Micheli

09:00 – 09:30

Resource-Aware Functional ECO Patch Generation
An-Che Cheng, Iris Hui-Ru Jiang and Jing-Yang Jou

09:30 – 10:00

Simultaneous Slack Matching, Gate Sizing and Repeater Insertion for Asynchronous Circuits
Gang Wu and Chris Chu

Session TitleFormal Bit Precise Reasoning
Session Code / Room9.5 / Konferenz 3
Date / TimeThursday, 17 March 2016 / 08:30 – 10:00
ChairMarkus Wedler, Synopsys GmbH, DE
Co-ChairJulien Schmaltz, Eindhoven University of Technology, NL

08:30 – 09:00

Formal Verification of Integer Multipliers by Combining Gröbner Basis with Logic Reduction
Amr Sayed-Ahmed, Daniel Große, Ulrich Kühne, Mathias Soeken and Rolf Drechsler

09:00 – 09:30

Root-Cause Analysis for Memory-Locked Errors
John Adler, Djordje Maksimovic and Andreas Veneris

09:30 – 10:00

Formal Verification of Clock Domain Crossing using Gate-level Models of Metastable Flip-Flops
Ghaith Tarawneh, Andrey Mokhov and Alex Yakovlev

Session TitleReal-Time Scheduling
Session Code / Room9.6 / Konferenz 4
Date / TimeThursday, 17 March 2016 / 08:30 – 10:00
ChairFrank Slomka, Universität Ulm, DE
Co-ChairKai Lampka, Uppsala University, SE

08:30 – 09:00

Response-Time Analysis of DAG Tasks under Fixed Priority Scheduling with Limited Preemptions
Maria A. Serrano, Alessandra Melani, Marko Bertogna and Eduardo Quinones

09:00 – 09:30

Speed Optimization for Tasks with Two Resources
Alessandra Melani, Renato Mancuso, Daniel Cullina, Marco Caccamo and Lothar Thiele

09:30 – 10:00

Self-Suspension Real-Time Tasks under Fixed-Relative-Deadline Fixed-Priority Scheduling
Wen-Hung Huang and Jian-Jia Chen

Session TitleTemperature Awareness in Computing Systems
Session Code / Room9.7 / Konferenz 5
Date / TimeThursday, 17 March 2016 / 08:30 – 10:00
ChairMuhammad Shafique, Karlsruhe Institute of Technology, DE
Co-ChairMarina Zapater, Complutense University of Madrid, ES

08:30 – 09:00

Thermal-aware Dynamic Page Allocation Policy by Future Access Patterns for Hybrid Memory Cube (HMC)
Wei-Hen Lo, Kai-zen Liang and TingTing Hwang

09:00 – 09:30

Minimizing Peak Temperature for Pipelined Hard Real-time Systems
Long Cheng, Kai Huang, Gang Chen, Biao Hu and Alois Knoll

09:30 – 10:00

Thermal Aware Scheduling and Mapping of Multiphase Applications onto Chip Multiprocessor
Aryabartta Sahu

Session TitleEmbedded Tutorial: Analog-/Mixed-Signal Verification Methods for AMS Coverage Analysis
Session Code / Room9.8 / Exhibition Theater
Date / TimeThursday, 17 March 2016 / 08:30 – 10:00
Organisers Gregor Nitsche, OFFIS, DE
ChairLars Hedrich, Johann Wolfgang Goethe-Universität, DE
Co-ChairChristoph Grimm, University of Kaiserslautern, DE

08:30 – 10:00

Embedded Tutorial: Analog-/Mixed-Signal Verification Methods for AMS Coverage Analysis
Erich Barke, Andreas Fürtig, Georg Gläser, Christoph Grimm, Lars Hedrich, Stefan Heinen, Eckhard Hennig, Hyun-Sek Lukas Lee, Wolfgang Nebel, Gregor Nitsche, Markus Olbrich, Carna Radojicic and Fabian Speicher

08:30 – 09:00

Towards More Dependable Verification Using Symbolic Simulation
Carna Radojicic, Christoph Grimm, Fabian Speicher and Stefan Heinen

09:00 – 09:30

Identification of Critical Scenarios in AMS Verification: Methodology for Finding the Safe Operating Area of AMS Systems
Georg Gläser, Hyun-Sek Lukas Lee, Markus Olbrich, Erich Barke and Eckhard Hennig

09:30 – 10:00

AMS Leaf-Component Characterization with Contracts and Satisfaction Checking vs. Electronic Circuit Schematics
Gregor Nitsche, Andreas Fürtig, Lars Hedrich and Wolfgang Nebel

Session TitleInteractive Presentations
Session Code / RoomIP4
Date / TimeThursday, 17 March 2016 / 10:00 – 10:30


A q-gram Birthmarking Approach to Predicting Reusable Hardware
Kevin Zeng and Peter Athanas


Captopril: Reducing the Pressure of Bit Flips on Hot Locations in Non-Volatile Main Memories
Majid Jalili and Hamid Sarbazi-Azad


Handling Complex Dependencies in System Design
Mischa Moestl and Rolf Ernst


A Synthesis-Agnostic Behavioral Fault Model for High Gate-Level Fault Coverage
Anton Karputkin and Jaan Raik


Combining Graph-based Guidance with Error Effect Simulation for Efficient Safety Analysis
Jo Laufenberg, Sebastian Reiter, Alexander Viehl, Oliver Bringmann, Thomas Kropf and Wolfgang Rosenstiel


Packet Security with Path Sensitization for NoCs
Travis Boraten and Avinash Karanth Kodi


Synthesis of Approximate Coders for On-chip Interconnects Using Reversible Logic
Robert Wille, Oliver Keszocze, Stefan Hillmich, Marcel Walter and Alberto Garcia-Ortiz


Design-Synthesis Co-Optimisation Using Skewed and Tapered Gates
Ayan Datta, James D. Warnock, Ankur Shukla, Saurabh Gupta, Yiu. H. Chan, Karthik Mohan and Charudhattan Nagarajan


A Synthesis-Parameter Tuning System for Autonomous Design-Space Exploration
Matthew M. Ziegler, Hung-Yi Liu, George Gristede, Bruce Owens, Ricardo Nigaglioni and Luca P. Carloni


Unbounded Safety Verification for Hardware Using Software Analyzers
Rajdeep Mukherjee, Peter Schrammel, Daniel Kroening and Tom Melham


Verilog2SMV: A Tool for Word-level Verification
Ahmed Irfan, Alessandro Cimatti, Alberto Griggio, Marco Roveri and Roberto Sebastiani


Towards Formal Verification of Real-World SystemC TLM Peripheral Models — A Case Study
Hoang M. Le, Vladimir Herdt, Daniel Große and Rolf Drechsler


Frequency Scheduling For Resilient Chip Multi-Processors Operating at Near Threshold Voltage
Ying Wang, Huawei Li and Xiaowei Li


A Low Overhead Error Confinement Method based on Application Statistical Characteristics
Zheng Wang, Georgios Karakonstantis and Anupam Chattopadhyay

Session TitleSPECIAL DAY Hot Topic: Lightweight Security for Embedded Processors
Session Code / Room10.1 / Saal 2
Date / TimeThursday, 17 March 2016 / 11:00 – 12:30
ChairTilo Müller, Friedrich-Alexander-Universität Erlangen-Nürnberg, DE
Co-ChairPatrick Schaumont, Virginia Tech, US

11:00 – 11:30

Scaling Down: Lightweight Approaches to IoT Security
Patrick Koeberl

11:30 – 12:00

SOFIA: Software and Control Flow Integrity Architecture
Ruan de Clercq, Ronald De Keulenaer, Bart Coppens, Bohan Yang, Pieter Maene, Koen de Bosschere, Bart Preneel, Bjorn de Sutter and Ingrid Verbauwhede

12:00 – 12:30

Trust, But Verify: Why and How to Establish Trust in Embedded Devices
Aurélien Francillon

Session TitleDoes it Work or NoC?
Session Code / Room10.2 / Konferenz 6
Date / TimeThursday, 17 March 2016 / 11:00 – 12:30
ChairDavide Bertozzi, University of Ferrara, IT
Co-ChairKees Goossens, Eindhoven University of Technology, NL

11:00 – 11:30

CrossOver: Clock Domain Crossing under Virtual-Channel Flow Control
Michalis Paschou, Anastasios Psarras, Chrysostomos Nicopoulos and Giorgos Dimitrakopoulos

11:30 – 12:00

Correct Runtime Operation for NoCs through Adaptive-Region Protection
Rawan Abdel-Khalek and Valeria Bertacco

12:00 – 12:30

Fault-Tolerant 3-D Network-on-Chip Design using Dynamic Link Sharing
Seyyed Hossein Seyyedaghaei Rezaei, Mehdi Modarressi, Reza Yazdani Aminabadi and Masoud Daneshtalab

Session TitleDesign Experiences for Multimedia and Communication Applications
Session Code / Room10.3 / Konferenz 1
Date / TimeThursday, 17 March 2016 / 11:00 – 12:30
ChairTheocharis THEOCHARIDES, University of Cyprus, CY
Co-ChairSteffen Paul, University Bremen, DE

11:00 – 11:30

Enabling the Heterogeneous Accelerator Model on Ultra-Low Power Microcontroller Platforms
Francesco Conti, Daniele Palossi, Andrea Marongiu, Davide Rossi and Luca Benini

11:30 – 12:00

Thermal Optimization using Adaptive Approximate Computing for Video Coding
Daniel Palomino, Muhammad Shafique, Altamiro Susin and Jörg Henkel

12:00 – 12:15

High Performance Time-of-Flight and Color Sensor Fusion with Image-Guided Depth Super Resolution
Hannes Plank, Gerald Holweg, Thomas Herndl and Norbert Druml

12:15 – 12:30

Saturated Min-Sum Decoding: An “Afterburner” for LDPC Decoder Hardware
S. Scholl, P. Schläfer and N. Wehn

Session TitleStochastic Methods for Circuit Analysis & Synthesis
Session Code / Room10.4 / Konferenz 2
Date / TimeThursday, 17 March 2016 / 11:00 – 12:30
ChairMichal Rewienski, Technical University of Gdansk, PL
Co-ChairL. Miguel Silveira, INESC-ID, IST, U Lisboa, PT

11:00 – 11:30

Utilizing Macromodels in Floating Random Walk Based Capacitance Extraction
Wenjian Yu, Bolong Zhang, Chao Zhang, Haiquan Wang and Luca Daniel

11:30 – 12:00

Variability and Statistical Analysis Flow for Dynamic Linear Systems with Large Number of Inputs
A. Lucas Martins, Jorge Fernández Villena and L. Miguel Silveira

12:00 – 12:30

Variation-Aware Near Threshold Circuit Synthesis
Mohammad Saber Golanbari, Saman Kiamehr, Mojtaba Ebrahimi and Mehdi B. Tahoori

Session TitleEnhancing Memory in Next-Generation Platforms
Session Code / Room10.5 / Konferenz 3
Date / TimeThursday, 17 March 2016 / 11:00 – 12:30
ChairFancisco Cazorla, Barcelona Supercomputing Center, ES
Co-ChairJeronimo Castrillon, Technische Universität Dresden, DE

11:00 – 11:30

Buffered Compares: Excavating the Hidden Parallelism Inside DRAM Architectures with Lightweight Logic
Jinho Lee, Jung Ho Ahn and Kiyoung Choi

11:30 – 12:00

Large Vector Extensions Inside the HMC
Marco A. Z. Alves, Matthias Diener, Paulo C. Santos and Luigi Carro

12:00 – 12:30

minFlash: A Minimalistic Clustered Flash Array
Ming Liu, Sang-Woo Jun, Sungjin Lee, Jamey Hicks and Arvind

Session TitleCompilers and Tools for GPUs and MPSoCs
Session Code / Room10.6 / Konferenz 4
Date / TimeThursday, 17 March 2016 / 11:00 – 12:30
ChairFrank Hannig, University of Erlangen-Nürnberg, DE
Co-ChairLars Bauer, Karlsruhe Institute of Technology, DE

11:00 – 11:30

An Optimized Task-Based Runtime System for Resource-Constrained Parallel Accelerators
Daniele Cesarini, Andrea Marongiu and Luca Benini

11:30 – 12:00

A Fine-grained Performance Model for GPU Architectures
Nicola Bombieri, Federico Busato and Franco Fummi

12:00 – 12:15

Critical Points Based Register-Concurrency Autotuning for GPUs
Ang Li, Shuaiwen Leon Song, Akash Kumar, Eddy Z. Zhang, Daniel Chavarrìa-Miranda and Henk Corporaal

12:15 – 12:30

GRATER: An Approximation Workflow for Exploiting Data-Level Parallelism in FPGA Acceleration
Atieh Lotfi, Abbas Rahimi, Amir Yazdanbakhsh, Hadi Esmaeilzadeh and Rajesh K. Gupta

Session TitleReliable System Design
Session Code / Room10.7 / Konferenz 5
Date / TimeThursday, 17 March 2016 / 11:00 – 12:30
ChairMohamed Sabry Aly, Stanford University, US
Co-ChairSemeen Rehman, Karlsruhe Institute of Technology, DE

11:00 – 11:30

A Holistic Tri-region MLC STT-RAM Design with Combined Performance, Energy, and Reliability Optimizations
Wujie Wen, Mengjie Mao, Hai Li, Yiran Chen, Yukui Pei and Ning Ge

11:30 – 12:00

Thermal-aware TSV Repair for Electromigration in 3D ICs
Shengcheng Wang, Mehdi B. Tahoori and Krishnendu Chakrabarty

12:00 – 12:30

Electrothermal Simulation of Bonding Wire Degradation under Uncertain Geometries
Thorben Casper, Herbert De Gersem, Renaud Gillon, Tomas Gotthans, Tomas Kratochvil, Peter Meuris, Sebastian Schöps

Session TitleLunch Time Keynote Session
Session Code / Room11.0
Date / TimeThursday, 17 March 2016 / 13:30 – 14:00
ChairLuca Fanucci, University of Pisa, IT
Co-ChairMatthias Schunter, Intel Corporation, DE

13:30 – 14:00

[Keynote] Secure Silicon: Enabler for the Internet of Things
Walden C. Rhines

Session TitleSPECIAL DAY Hot Topic: Embedded Security Applications
Session Code / Room11.1 / Saal 2
Date / TimeThursday, 17 March 2016 / 14:00 – 15:30
ChairTim Güneysu, University of Bremen, DE
Co-ChairX. Sharon Hu, University of Notre Dame, US

14:00 – 14:30

Smart Grid Security
Klaus Kursawe

14:30 – 15:00

Security In Industrie 4.0 — Challenges and Solutions for the Fourth Industrial Revolution
Michael Waidner and Michael Kasper

15:00 – 15:30

Security for Automotive and the Internet of Things
Paul Duplys, Hans Löhr, Herve Seudie and Robert Szerwinski

Session TitleBeating New Technology Paths for NoC
Session Code / Room11.2 / Konferenz 6
Date / TimeThursday, 17 March 2016 / 14:00 – 15:30
ChairPartha Pande, WSU, US
Co-ChairSébastien Le Beux, Le Beux, FR

14:00 – 14:30

Cross-layer Floorplan Optimization For Silicon Photonic NoCs In Many-core Systems
Ayse K. Coskun, Anjun Gu, Warren Jin, Ajay Joshi, Andrew B. Kahng, Jonathan Klamkin, Yenai Ma, John Recchio, Vaishnav Srinivas and Tiansheng Zhang

14:30 – 15:00

Adaptive Multi-Voltage Scaling in Wireless NoC for High Performance Low Power Applications
Hemanta Kumar Mondal, Sri Harsha Gade, Raghav Kishore and Sujay Deb

15:00 – 15:30

Energy Efficient Transceiver in Wireless Network on Chip Architectures
Vincenzo Catania, Andrea Mineo, Salvatore Monteleone, Maurizio Palesi and Davide Patti

Session TitleMicroarchitectures and Workload Allocation for Energy Efficiency
Session Code / Room11.3 / Konferenz 1
Date / TimeThursday, 17 March 2016 / 14:00 – 15:30
ChairAndrea Bartolini, Univ. of Bologna, IT
Co-ChairAndreas Burg, EPFL, CH

14:00 – 14:30

Resistive Configurable Associative Memory for Approximate Computing
Mohsen Imani, Abbas Rahimi and Tajana S. Rosing

14:30 – 15:00

Exploiting CPU-Load and Data Correlations in Multi-Objective VM Placement for Geo-Distributed Data Centers
Ali Pahlevan, Pablo Garcia del Valle and David Atienza

15:00 – 15:15

Energy Efficiency in Cloud-Based MapReduce Applications through Better Performance Estimation
Seyed Morteza Nabavinejad and Maziar Goudarzi

15:15 – 15:30

Unsupervised Power Modeling of Co-Allocated Workloads for Energy Efficiency in Data Centers
Juan C. Salinas-Hilburg, Marina Zapater, José L. Risco-Martín, José M. Moya and José L. Ayala

Session TitleAutomating Test Generation, Assertions and Diagnosis
Session Code / Room11.4 / Konferenz 2
Date / TimeThursday, 17 March 2016 / 14:00 – 15:30
ChairPablo Sanchez, University of Cantabria, ES
Co-ChairRonny Morad, IBM, IL

14:00 – 14:30

Automated Test Generation for Debugging Arithmetic Circuits
Farimah Farahmandi and Prabhat Mishra

14:30 – 15:00

MCXplore: An Automated Framework for Validating Memory Controller Designs
Mohamed Hassan and Hiren Patel

15:00 – 15:15

EAST: Efficient Assertion Simulation Techniques
Debjyoti Bhattacharjee, Soumi Chattopadhyay and Ansuman Banerjee

15:15 – 15:30

Combinational Trace Signal Selection with Improved State Restoration for Post-Silicon Debug
Siamack BeigMohammadi and Bijan Alizadeh

Session TitleDesign of Efficient Microarchitectures
Session Code / Room11.5 / Konferenz 3
Date / TimeThursday, 17 March 2016 / 14:00 – 15:30
ChairDionisios Pnevmatikatos, Technical University of Crete, GR
Co-ChairTodd Austin, University of Michigan, US

14:00 – 14:30

Practical Way Halting by Speculatively Accessing Halt Tags
Daniel Moreau, Alen Bardizbanyan, Magnus Själander, David Whalley and Per Larsson-Edefors

14:30 – 15:00

Lazy Pipelines: Enhancing Quality in Approximate Computing
G. Tziantzioulis, A. M. Gok, S. M. Faisal, N. Hardavellas, S. Ogrenci-Memik and S. Parthsarathy

15:00 – 15:30

High-Efficiency Logarithmic Number Unit Design based on an Improved Cotransformation Scheme
Youri Popoff, Florian Scheidegger, Michael Schaffner, Michael Gautschi, Frank K. Gürkaynak and Luca Benini

Session TitleApplications of Reconfigurable Computing
Session Code / Room11.6 / Konferenz 4
Date / TimeThursday, 17 March 2016 / 14:00 – 15:30
ChairAlessandro Cilardo, University of Naples Federico II, IT
Co-ChairKoen Bertels, Delft University of Technology, NL

14:00 – 14:30

Efficient FPGA Acceleration of Convolutional Neural Networks Using Logical-3D Compute Array
Atul Rahman, Jongeun Lee and Kiyoung Choi

14:30 – 15:00

Energy Efficient Video Fusion with Heterogeneous CPU-FPGA Devices
Peng Sun, Alin Achim, Ian Hasler, Paul Hill and Jose Nunez-Yanez

15:00 – 15:30

Highly Efficient Reconfigurable Parallel Graph Cuts for Embedded Vision
Antonis Nikitakis and Ioannis Papaefstathiou

Session TitleNaked Analog Synthesis
Session Code / Room11.7 / Konferenz 5
Date / TimeThursday, 17 March 2016 / 14:00 – 15:30
ChairÁrpád Árpád Bürmen, University of Ljubljana, SI
Co-ChairFrancisco Fernandez, IMSE-CNM, ES

14:00 – 14:30

Pareto Front Analog Layout Placement using Satisfiability Modulo Theories
Sherif M. Saif, Mohamed Dessouky, M. Watheq El-Kharashi, Hazem Abbas and Salwa Nassar

14:30 – 15:00

Efficient Multiple Starting Point Optimization for Automated Analog Circuit Optimization via Recycling Simulation Data
Bo Peng, Fan Yang, Changhao Yan, Xuan Zeng and Dian Zhou

15:00 – 15:30

PolyGP: Improving GP-Based Analog Optimization through Accurate High-Order Monomials and Semidefinite Relaxation
Ye Wang, Constantine Caramanis and Michael Orshansky

Session TitleInteractive Presentations
Session Code / RoomIP5
Date / TimeThursday, 17 March 2016 / 15:30 – 16:00


Reliability and Performance Trade-offs for 3D NoC-Enabled Multicore Chips
Sourav Das, Janardhan Rao Doppa, Partha Pratim Pande and Krishnendu Chakrabarty


Memory-Access Aware DVFS for Network-on-Chip in CMPs
Yuan Yao and Zhonghai Lu


A Dynamically Reconfigurable ECC Decoder Architecture
Awais Sani, Philippe Coussy and Cyrille Chavet


Resistive Bloom Filters: From Approximate Membership to Approximate Computing with Bounded Errors
Vahideh Akhlaghi, Abbas Rahimi and Rajesh K. Gupta


Real-Time System-Level Implementation of a Telepresence Robot Using an Embedded GPU Platform
Muhammad Teguh Satria, Swathi Gurumani, Wang Zheng, Keng Peng Tee, Augustine Koh, Pan Yu, Kyle Rupnow and Deming Chen


Exploring Specialized Near-Memory Processing for Data Intensive Operations
Salessawi Ferede Yitbarek, Tao Yang, Reetuparna Das and Todd Austin


Matlab to C Compilation Targeting Application Specific Instruction Set Processors
Ioannis Latifis, Karthick Parashar, Grigoris Dimitroulakos, Hans Cappelle, Christakis Lezos, Konstantinos Masselos and Francky Catthoor


Sampling-based Buffer Insertion for Post-Silicon Yield Improvement under Process Variability
Grace Li Zhang, Bing Li and Ulf Schlichtmann


PRADA: Combating Voltage Noise in the NoC Power Supply Through Flow-Control and Routing Algorithms
Prabal Basu, Rajesh Jayashankara Shridevi, Koushik Chakraborty and Sanghamitra Roy


A Power-Efficient 3-D On-Chip Interconnect for Multi-Core Accelerators with Stacked L2 Cache
Kyungsu Kang, Sangho Park, Jong-Bae Lee, Luca Benini and Giovanni De Micheli


Power-Efficient Load-Balancing on Heterogeneous Computing Platforms
Muhammad Usman Karim Khan, Muhammad Shafique, Apratim Gupta, Thomas Schumann and Jörg Henkel


Topaz: Mining High-Level Safety Properties from Logic Simulation Traces
Ahmed Nassar, Fadi J. Kurdahi and Salam R. Zantout


Exploiting Transaction Level Models for Observability-aware Post-silicon Test Generation
Farimah Farahmandi, Prabhat Mishra and Sandip Ray


SEERAD: A High Speed yet Energy-Efficient Rounding-based Approximate Divider
Reza Zendegani, Mehdi Kamal, Arash Fayyazi, Ali Afzali-Kusha, Saeed Safari and Massoud Pedram


Improving Performance Guarantees in Wormhole Mesh NoC Designs
Miloš Panić, Carles Hernandez, Jaume Abella, Antoni Roca, Eduardo Quiñonesy and Francisco J. Cazorla


A Data Layout Transformation (DLT) Accelerator: Architectural Support for Data Movement Optimization in Accelerated-centric Heterogeneous Systems
Tung Thanh-Hoang, Amirali Shambayati and Andrew A. Chien


Ouessant: Flexible Integration of Dedicated Coprocessors in Systems On Chip
Pierre-Henri Horrein, Philip-Dylan Gleonec, Erwan Libessart, André Lalevée and Matthieu Arzel


A novel Background Subtraction Scheme for in-Camera Acceleration in Thermal Imagery
Antonis Nikitakis, Ioannis Papaefstathiou, Konstantinos Makantasis and Anastasios Doulamis


Radiation-Hardened DSP Configurations for Implementing Arithmetic Functions on FPGA
Marcos Sanchez-Elez, Inmaculada Pardines, Felipe Serrano and Hortensia Mecha


Configuration Prefetching and Reuse for Preemptive Hardware Multitasking on Partially Reconfigurable FPGAs
Aurelio Morales-Villanueva, Rohit Kumar and Ann Gordon-Ross


Analog Circuit Topological Feature Extraction with Unsupervised Learning of New Sub-Structures
Hao Li, Fanshu Jiao and Alex Doboli


Design Automation Tasks Scheduling for Enhanced Parallel Execution of a State-of-the-Art Layout-Aware Sizing Approach
David Neves, Ricardo Martins, Nuno Lourenço and Nuno Horta

Session TitleSPECIAL DAY Hot Topic: Design Methods for Security and Trust
Session Code / Room12.1 / Saal 2
Date / TimeThursday, 17 March 2016 / 16:00 – 17:30
ChairJean-Luc Danger, Télécom ParisTech, FR
Co-ChairIlia Polian, Universität Passau, DE

16:00 – 16:30

A Design Method for Remote Integrity Checking of Complex PCBs
Aydin Aysu, Shravya Gaddam, Harsha Mandadi, Carol Pinto, Luke Wegryn and Patrick Schaumont

16:30 – 17:00

Quantifying Hardware Security Using Joint Information Flow Analysis
Ryan Kastner, Wei Hu and Alric Althoff

17:00 – 17:30

Instruction Set Extensions for Secure Applications
Francesco Regazzoni and Paolo Ienne

Session TitleHot Topic: Exploiting New Transistor Technologies to Enhance Hardware Security (without PUFs!)
Session Code / Room12.2 / Konferenz 6
Date / TimeThursday, 17 March 2016 / 16:00 – 17:30
Organisers Michael Niemier, University of Notre Dame, South Bend, US
ChairSri Parameswaran, The University of New South Wales, AU

16:00 – 16:30

Hardware Security Through Chain Assurance
Yaw Obeng, Colm Nolan and David Brown

16:30 – 17:00

Leverage Emerging Technologies For DPA-Resilient Block Cipher Design
Yu Bi, Kaveh Shamsi, Jiann-Shiun Yuan, Francois-Xavier Standaer and Yier Jin

17:00 – 17:30

Using Emerging Technologies for Hardware Security Beyond PUFs
An Chen, X. Sharon Hu, Yier Jin, Michael Niemier and Xunzhao Yin

Session TitleSystem Support for Resilience and Robustness
Session Code / Room12.3 / Konferenz 1
Date / TimeThursday, 17 March 2016 / 16:00 – 17:30
ChairOliver Bringmann, University of Tuebingen, DE
Co-ChairDirk Stroobandt, Ghent University, BE

16:00 – 16:30

Effect of LFSR Seeding, Scrambling and Feedback Polynomial on Stochastic Computing Accuracy
Jason H. Anderson, Yuko Hara-Azumi and Shigeru Yamashita

16:30 – 17:00

Efficient Program Tracing and Monitoring Through Power Consumption — With a Little Help from the Compiler
Carlos Moreno, Sean Kauffman and Sebastian Fischmeister

17:00 – 17:15

FLIC: Fast, Lightweight Checkpointing for Mobile Virtualization using NVRAM
Kan Zhong, Duo Liu, Liang Liang, Linbo Long, Yi Lin and Zili Shao

17:15 – 17:30

PAIS: Parallelization Aware Instruction Scheduling for Improving Soft-error Reliability of GPU-based Systems
Haeseung Lee, Hsinchung Chen and Mohammad Abdullah Al Faruque

Session TitleSimulating Everything: From Timing to Instructions
Session Code / Room12.4 / Konferenz 2
Date / TimeThursday, 17 March 2016 / 16:00 – 17:30
ChairElena Ioana Vatajelu, Politecnico di Torino, IT
Co-ChairValeria Bertacco, University of Michigan, US

16:00 – 16:30

Accelerating Source-Level Timing Simulation
Simon Schulz and Oliver Bringmann

16:30 – 17:00

Sparsity-Oriented Sparse Solver Design for Circuit Simulation
Xiaoming Chen, Lixue Xia, Yu Wang and Huazhong Yang

17:00 – 17:15

Integration of Mixed-signal Components into Virtual Platforms for Holistic Simulation of Smart Systems
Enrico Fraccaroli, Michele Lora, Sara Vinco, Davide Quaglia and Franco Fummi

17:15 – 17:30

Decision Tree Generation for Decoding Irregular Instructions
Katsumi Okuda and Haruhiko Takeyama

Session TitleAccelerator Design and Heterogeneous Architectures
Session Code / Room12.5 / Konferenz 3
Date / TimeThursday, 17 March 2016 / 16:00 – 17:30
ChairCristina Silvano, Politecnico di Milano, IT
Co-ChairTodd Austin, University of Michigan, US

16:00 – 16:30

A Reconfigurable Heterogeneous Multicore with a Homogeneous ISA
Jeckson Dellagostin Souza, Luigi Carro, Mateus Beck Rutzig and Antonio Carlos Schneider Beck

16:30 – 17:00

The Neuro Vector Engine: Flexibility to Improve Convolutional Net Efficiency for Wearable Vision
Maurice Peemen, Runbin Shi, Sohan Lal, Ben Juurlink, Bart Mesman and Henk Corporaal

17:00 – 17:15

Improving Scalability of CMPs with Dense ACCs Coverage
Nasibeh Teimouri, Hamed Tabkhi and Gunar Schirner

17:15 – 17:30

Hardware Accelerator for Analytics of Sparse Data
Eriko Nurvitadhi, Asit Mishra, Yu Wang, Ganesh Venkatesh and Debbie Marr

Session TitleReconfigurable Computing Platforms and Architectures
Session Code / Room12.6 / Konferenz 4
Date / TimeThursday, 17 March 2016 / 16:00 – 17:30
ChairDirk Stroobandt, Ghent University, BE
Co-ChairJürgen Becker, Karlsruhe Institute of Technology, DE

16:00 – 16:30

Securing the Cloud with Reconfigurable Computing: An FPGA Accelerator for Homomorphic Encryption
Alessandro Cilardo and Domenico Argenziano

16:30 – 17:00

Throughput Oriented FPGA Overlays Using DSP Blocks
Abhishek Kumar Jain, Douglas L. Maskell and Suhaib A. Fahmy

17:00 – 17:30

Run-time Phase Prediction for a Reconfigurable VLIW Processor
Qi Guo, Anderson Sartor, Anthony Brandon, Antonio C. S. Beck, Xuehai Zhou and Stephan Wong

Session TitleFormal System Level Verification
Session Code / Room12.7 / Konferenz 5
Date / TimeThursday, 17 March 2016 / 16:00 – 17:30
ChairMathias Soeken, EPFL, CH
Co-ChairGianpiero Cabodi, Politecnio di Torino, IT

16:00 – 16:30

ADVOCAT: Automated Deadlock Verification for On-chip Cache Coherence and Interconnects
Freek Verbeek, Pooria M. Yaghini, Ashkan Eghbal and Nader Bagherzadeh

16:30 – 17:00

Guarantees for Runnable Entities with Heterogeneous Real-Time Requirements
Leonie Ahrendts, Zain A. H. Hammadeh and Rolf Ernst

17:00 – 17:30

Validating Scheduling Transformation for Behavioral Synthesis
Zhenkun Yang, Kecheng Hao, Kai Cong, Li Lei, Sandip Ray and Fei Xie