DATE 2016 Best Papers                                                                         

•  The DATE 2016 Best Papers

•  Best Paper Award Nominations

DATE Best Paper Awards

Each year the Design, Automation and Test in Europe Conference presents awards to the authors of the best papers. The selection is performed by the award committee.

The DATE 2016 best papers are:

D Track
UTILIZING MACROMODELS IN FLOATING RANDOM WALK BASED CAPACITANCE EXTRACTION
Wenjian Yu¹, Bolong Zhang¹, Chao Zhang¹, Haiquan Wang¹, Luca Daniel^2
1Tsinghua University, ²Massachusetts Institute of Technology (MIT)

A Track
OTEM: OPTIMIZED THERMAL AND ENERGY MANAGEMENT FOR HYBRID ELECTRICAL ENERGY STORAGE IN ELECTRIC VEHICLES
Korosh Vatanparvar and Mohammad Al Faruque
University of California, Irvine

T Track
MODELING FABRICATION NON-UNIFORMITY IN CHIP-SCALE SILICON PHOTONIC INTERCONNECTS
Mahdi Nikdast¹, Gabriela Nicolescu², Jelena Trajkovic³, Odile Liboiron-Ladouceur^4
1Polytechnique Montréal and McGill University, ²Polytechnique Montréal, ³Concordia University, ⁴McGill University

E Track
PROBABILISTIC WCET ESTIMATION IN PRESENCE OF HARDWARE FOR MITIGATING THE IMPACT OF PERMANENT FAULTS
Damien Hardy¹, Isabelle Puaut¹, Yiannakis Sazeides^2
1University of Rennes 1/IRISA, ²University of Cyprus

Best Paper Award Nominations

D Track
A HOLISTIC TRI-REGION MLC STT-RAM DESIGN WITH COMBINED PERFORMANCE, ENERGY, AND RELIABILITY OPTIMIZATIONS”
Wujie Wen¹, Mengjie Mao², Hai Li², Yiran Chen², Yukui Pei³, Ning Ge^3
1Florida International University, ²University of Pittsburgh, ³Tsinghua University

PARETO FRONT ANALOG LAYOUT PLACEMENT USING SATISFIABILITY MODULO THEORIES
Sherif Saif¹, Mohamed Dessouky², M. Watheq El-Kharashi³, Hazem Abbas⁴, Salwa Nassar^1
1Electronics Research Institute, ²Mentor Graphics Corporation, ³Faculty of Engineering, Ain Shams University, ⁴Faculty of Media Engineering & Technology, GUC

A RECONFIGURABLE HETEROGENEOUS MULTICORE WITH A HOMOGENEOUS ISA
Jeckson Dellagostin Souza¹, Luigi Carro², Mateus Beck Rutzig³, Antonio Carlos Schneider Beck Filho^1
1Universidade Federal do Rio Grande do Sul, ²Universidade Federal do Rio Grande do Sul(UFRGS), ³Universidade Federal de Santa Maria

BUFFERED COMPARES: EXCAVATING THE HIDDEN PARALLELISM INSIDE DRAM ARCHITECTURES WITH LIGHTWEIGHT LOGIC”
Jinho Lee, Jung Ho Ahn, Kiyoung Choi
Seoul National University

BUILT-IN TEST OF MILLIMETER-WAVE CIRCUITS BASED ON NON-INTRUSIVE SENSORS
Athanasios Dimakos¹, Haralampos-G. Stratigopoulos², Alexandre Siligaris³, Salvador Mir¹, Emeric De Foucauld^3
1Université Grenoble Alpes, CNRS, TIMA, ²Sorbonne Universités, UPMC, ³CEA-Leti

FORMAL VERIFICATION OF INTEGER MULTIPLIERS BY COMBINING GRÖBNER BASIS WITH LOGIC REDUCTION
Amr Sayed Ahmed¹, Daniel Grosse¹, Ulrich Kühne¹, Mathias Soeken¹, Rolf Drechsler^2
1University of Bremen, ²University of Bremen/DFKI

A Track
TOTAL: TRNG ON-THE-FLY TESTING FOR ATTACK DETECTION USING LIGHTWEIGHT HARDWARE
Bohan Yang¹, Vladimir Rozic¹, Nele Mentens¹, Wim Dehaene², Ingrid Verbauwhede^1
1KU Leuven, ²KU Leuven and IMEC

T Track
PRE-BOND TESTING OF THE SILICON INTERPOSER IN 2.5 D ICS
Ran Wang¹, Zipeng Li¹, Sukeshwar Kannan², Krishnendu Chakrabarty^1
1Duke University, ²Global Foundries Inc.

INEXACT DESIGNS FOR APPROXIMATE LOW POWER ADDITION BY CELL REPLACEMENT
Haider A.F. Almurib¹, Nandha Kumar Thulasiraman¹, Fabrizio Lombardi^2
1The University of Nottingham, ²Northeastern University

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