M11 Post-Silicon Validation and Debug: Best Practices and Disruptive Innovation

Printer-friendly versionPDF version

Agenda

Agenda

TimeLabelSession
14:30M11.1Session 1
00:00M11.1.1Big Picture (Nagib Hakim, Subhasish Mitra, Amir Nahir)
Nagib Hakim1, Subhasish Mitra2 and Amir Nahir3
1Intel Corporation Santa Clara, US; 2Stanford University, US; 3IBM Research Labs Haifa, IL

16:30M11.2Session 2
00:00M11.2.1Observability enhancement during post-silicon validation (Alan Hu, Subhasish Mitra)
Alan Hu1 and Subhasish Mitra2
1University of British Columbia, CA; 2Stanford University, US

Groups: