M05 Wireless NoC as Interconnection Backbone for Multicore Chips: Promises, Challenges, and Recent Developments

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Agenda

Agenda

TimeLabelSession
09:30M05.1Session 1
00:00M05.1.1Foundations of On-chip Communication: Performance and Power Management in 2D and 3D Multicore Platforms
Radu Marculescu, ,

00:00M05.1.2WiNoC: Network Architecture and Communication Resource Management
Partha Pratim Pande, ,

11:30M05.2Session 2
00:00M05.2.1Millimeter-Wave Wireless Link: The Physical Layer Design for WiNoCs
Deukhyoun Heo, ,

00:00M05.2.13D WiNoC Architectures
Hiroki Matsutani, ,

Groups: