|
A |
Low Power SoC Design: Best Practice – and what’s next? |
0930 - 1800 |
Belle-Etoile |
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|
B |
Electronic System Level Design and Verification |
0930 - 1800 |
Chartreuse |
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|
C |
Manufacturing, CAD and Thermal-Aware Design for 3D System-on-Chip Design |
0930 - 1800 |
Les Bans |
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|
D1 |
MPSoC Hardware/Software Architectural and Design Challenges/Solutions |
0930 - 1300 |
Meije 3 |
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|
D2 |
Model-based MPSoC Architecture Synthesis for Highly-demanding Embedded Applications |
1430 - 1800 |
Meije 3 |
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|
E1 |
On-chip Interconnect for New Generation of SoC |
0930 - 1300 |
7 Laux 4 |
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|
E2 |
Design and Verification Challenges for Automotive Electronics |
1430 - 1800 |
7 Laux 4 |
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|
F1 |
Renewable energy: solar power generation, conversion and delivery |
0930 - 1300 |
7 Laux 5 |
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|
F2 |
Overcoming CMOS Reliability Challenges: From Devices to Circuits and Systems |
1430 - 1800 |
7 Laux 5 |
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|
G1 |
Power-Aware Testing and Test Strategies for Low Power Devices |
0930 - 1300 |
Meije 2 |
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|
G2 |
Testing TSV-Based 3D Stacked Ics |
1430 - 1800 |
Meije 2 |
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