A Low Power SoC Design: Best Practice – and what’s next?

Printer-friendly versionPDF version

SPEAKERS' BIOGRAPHIES

Dr. David Flynn, a Fellow in R&D at ARM Ltd, has been with the company since 1991, specializing in System-on-Chip IP deployment and methodology. He is the original architect behind ARM's synthesizable CPU family and the AMBA on-chip interconnect standard. His current research focus is low-power system-level design. He holds a BSc in Computer Science from Hatfield Polytechnic, UK and a Doctorate in Electronic Engineering from Loughborough University, UK. He is currently part-time Visiting Professor with the Electronics and Computer Science Department at Southampton University, UK. David is a primary author of the Low Power Methodology Manual co-developed with Synopsys and launched in 2007 and a contributing author to the VMM-LP launched 2009.

Alan Gibbons is a Principal Engineer at Synopsys Inc. with a focus on the development of advanced technology and methodology for energy efficient processor based SoC design. He has been involved in IC engineering for 25 years specializing in the design and development of processor based SoCs for communication applications and is a co-author of the Low Power Methodology Manual. Alan holds a BSc in Physics, Applied Physics and Microelectronics from Nottingham University, UK.

Dr. José Pineda de Gyvez (F'09) received the Ph.d. degree from the Eindhoven University of Technology, The Netherlands, in 1991. From 1991 until 1999 he was a Faculty member in the Department of Electrical Engineering at Texas A&M University, USA. He is currently a Senior Principal at NXP Semiconductors in The Netherlands. Since 2006 he also holds the professorship "Deep Submicron Integration" in the Department of Electrical Engineering at the Eindhoven University of Technology, The Netherlands. Dr. Pineda de Gyvez has been Associate Editor in IEEE Transactions on Circuits and Systems Part I and Part II, and also Associate Editor for Technology in IEEE Transactions on Semiconductor Manufacturing. He is also a member of the editorial board of the Journal of Low Power Electronics. Pineda's research has been funded by the Dutch Ministry of Science, US Office of Naval Research, US National Science Foundation, among others.

David Jacquet joined STMicroelectronics in 1995 after being graduated as a microelectronics engineer from ENSERG-ENSIMAG French high school. He worked for 8 years in a product division as a Design & Architecture Team leader for the development of a 64 bit VLIW DSP. Then, he joined a new product division leading the SOC Low Power architecture activities for digital baseband and application processor products for mobile platforms which are now part of ST-Ericsson. He is now leading the architecture activities for the implementation of Energy Efficient High Performance CPUs in ST-Ericsson.

Dr. Praveen Raghavan received his BE degree from Regional Engineering College (Trichy, India), MS in Electrical Engineering in 2002 from Arizona State University in 2004 and his Phd degree from Katholieke Universiteit Leuven, Belgium in 2009.  Since 2004 he has also been a researcher in the wireless group at Interuniversity Microelectronics Center (IMEC). He has been a visiting researcher at Berkeley Wireless Research Center (BWRC) in 2007. Since 2009 he is a senior researcher and the platform architect at IMEC working on platforms for cognitive and software defined radio. He has more than 60 publications and holds 6 patents in the area of architectures and SW for low power design.

Groups: