7.1 Special Day on "Embedded Meets Hyperscale and HPC" Session: Tools and Runtime Systems

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Date: Wednesday 27 March 2019
Time: 14:30 - 16:00
Location / Room: Room 1

Christian Plessl, Paderborn University, DE

Christoph Hagleitner, IBM Research, CH

Programming and operating heterogeneous computing systems that use multiple computing resources poses additional challenges to the programmer, e.g. handling different programming and execution models, partitioning application to exploit the strength of each resource type, or modeling and optimizing the overall and efficiency. In this session, we will discuss tools and runtime systems that support the developer with these tasks by raising the level of abstraction for application specification

TimeLabelPresentation Title
Speaker and Author:
Jeffrey S Vetter, Oak Ridge National Laboratory, US
Concerns about energy-efficiency and cost are forcing our community to reexamine system architectures, including the memory and storage hierarchy. While computing technologies have remained relatively stable for nearly two decades, new architectural features, such as heterogeneous cores, deep memory hierarchies, non-volatile memory (NVM), and near-memory processing, have emerged as possible solutions to address these concerns. However, we expect this "golden age"of architectural change to lead to extreme heterogeneity and it will have a major impact on software systems and applications. Software will need to be redesigned to exploit these new capabilities and provide some level of performance portability across these diverse architectures. In this talk, I will sample these emerging memory technologies, discuss their architectural and software implications, and describe several new approaches to address these challenges. One programming system we have designed allows users to program FPGAs using C and OpenACC directives, which facilitates portability to GPUs and CPUs. Another system is Papyrus (Parallel Aggregate Persistent -yru- Storage); it is a programming system that aggregates NVM from across the system for use as application data structures, such as vectors and key-value stores, while providing performance portability across emerging NVM hierarchies.
Speaker and Author:
Jesus Labarta, Barcelona Supercomputing Center, ES
Initially aiming at the node level parallelization of HPC science and engineering codes, OmpSs has been proposing programming model features to enable the incremental migration of applications to the recent and foreseeable architectures. Heterogeneity is and will be an important characteristic of such systems but the spectrum of future devices is wide and open. In this context, ensuring programmer productivity and quality of life as well as code portability requires mechanisms that make heterogeneous systems appear as uniform as possible. The OmpSs task based approach provides such homogenization of heterogeneity, enabling the execution of a single program on nodes with just multicores or including GPUs or FPGAs.
Speaker and Author:
João M. P. Cardoso, University of Porto/FEUP, PT
The customization features, large scale parallel computing power, heterogeneity, and hardware reconfigurability of FPGAs make them suitable computing platforms in many application domains, from high-performance to embedded computing. FPGAs are not only able to provide hardware acceleration to algorithms but to also provide complete system solutions with low cost and efficient performance/energy tradeoffs. In recent years we witnessed significant maturity levels in high-level synthesis (HLS) and in FPGA design flows, helping the mapping of computations to FPGAs. However, in order that HLS tools are able to achieve efficient FPGA implementations, applications source code typically needs substantial code restructuring/refactoring. This is neither a simple task for software developers nor for compilers and its automation has become an important line of research. This presentation will start by motivating the investment on source-to-source compilers and then will focus on some of the problems regarding automatic code restructuring. We will focus on the automatic code restructuring improvements over the last years, the trends, the challenges, and on the aspects that make automatic code restructuring an exciting research subject. Finally, we will show our recent and promising approach to automatic code restructuring.
16:00End of session
Coffee Break in Exhibition Area

Coffee Breaks in the Exhibition Area

On all conference days (Tuesday to Thursday), coffee and tea will be served during the coffee breaks at the below-mentioned times in the exhibition area.

Lunch Breaks (Lunch Area)

On all conference days (Tuesday to Thursday), a seated lunch (lunch buffet) will be offered in the Lunch Area to fully registered conference delegates only. There will be badge control at the entrance to the lunch break area.

Tuesday, March 26, 2019

Wednesday, March 27, 2019

Thursday, March 28, 2019