Shared FPGAs and the Holy Grail: Protections against Side-Channel and Fault Attacks
Ognjen Glamočanin1, Dina G. Mahmoud1, Francesco Regazzoni2,3 and Mirjana Stojilović1
1EPFL, School of Computer and Communication Sciences, Lausanne, Switzerland
2University of Amsterdam, Amsterdam, The Netherlands
3ALaRI, Università della Svizzera italiana, Lugano, Switzerland
ABSTRACT
In this paper, we survey recently proposed methods for protecting against side-channel and fault attacks in shared FPGAs. These methods are quite versatile, targeting FPGA compilation flow, real-time timing-fault detection, on-chip active fences, automated bitstream verification, etc. Despite their versatility, they are mostly designed to counteract a specific class of attacks. To understand how to address the problem of security in shared FPGAs in a comprehensive way, we discuss their individual strengths and weaknesses, in an attempt to identify research directions necessitating further investigation.
Keywords: FPGA, Multitenancy, Security.
