Common-Centroid Layouts for Analog Circuits: Advantages and Limitations
Arvind K. Sharma1, Meghna Madhusudan1, Steven M. Burns2, Parijat Mukherjee2, Soner Yaldiz2, Ramesh Harjani1 and Sachin S. Sapatnekar1
1University of Minnesota, Minneapolis, MN
2Intel Corporation, Hillsboro, OR
ABSTRACT
Common-centroid (CC) layouts are widely used in analog design to make circuits resilient to variations by matching device characteristics. However, CC layout may involve increased routing complexity and higher parasitics than other alternative layout schemes. This paper critically analyzes the fundamental assumptions behind the use of common-centroid layouts, incorporating considerations related to systematic and random variations as well as the performance impact of common-centroid layout. Based on this study, conclusions are drawn on when CC layout styles can reduce variation, improve performance (even if they do not reduce variation), and when non-CC layouts are preferable.
