Density Enhancement of RRAMs using a RESET Write Termination for MLC Operation
H. Aziza1, S. Hamdioui2, M. Fieback2, M. Taouil2 and M. Moreau1
1IM2NP, UMR CNRS 7334, Aix-Marseille Université, 38 rue Joliot Curie, F-13451, Marseille, France
2Computer Engineering Laboratory, Delft University of Technology, Mekelweg 4, 2628CD, Delft, The Netherlands
ABSTRACT
Multi-Level Cell (MLC) technology can greatly reduce Resistive RAM (RRAM) die sizes to achieve a breakthrough in cost structure. In this paper, a novel design scheme is proposed to realize reliable and uniform MLC RRAM operation without the need of any read verification. MLC is implemented based on a strict control of the cell programming currents of 1T-1R HfO2-based RRAM cells. Specifically, a selfadaptive write termination circuit is proposed to control the RRAM RESET current. Eight different resistance states are obtained by varying the compliance current which is defined as the minimal current allowed by the termination circuit in the RESET direction.
Keywords: Multi-level cell, MLC, Resistive RAM, RRAM, Oxide-based RAM (OxRAM), variability, Current Control.
