Library-free Structure Recognition for Analog Circuits
Maximilian Neunera, Inga Abelb and Helmut Graebc
Chair of Electronic Design Automation, Technical University of Munich, Munich, Germany
amaximilian.neuner@tum.de
binga.abel@tum.de
chelmut.graeb@tum.de
ABSTRACT
Extracting structural information of a design is one crucial aspect of many circuit verification and synthesis methods. State-of-the-art structure recognition methods use a predefined building block library to identify the basic building blocks in a circuit. However, the capability of these algorithms is limited by the scope, correctness and completeness of the provided library. This paper presents a new method to automatically generate the recognition rules required to identify a given circuit topology in a large design. Device pairs are grouped into building blocks by analyzing their characteristics, e.g., their connectivity, to enable a structure recognition as unambiguous as possible. The resulting blocks are consecutively assembled to larger blocks until the full building block description of the given topology has been established. Building block libraries dedicated to one specific topology type, e.g., operational amplifiers, can be obtained by applying the method to its basic version, subsequently extending the generated library by the additional elements required to identify its topology variants using the presented method. Experimental results for six folded cascode amplifier and five level shifter topologies are given.
Keywords: Building Blocks, Structure Recognition, Libraryfree, Circuit Verification.
