Digital Offset for RRAM-based Neuromorphic Computing: A Novel Solution to Conquer Cycle-to-cycle Variation
Ziqi Meng1, Weikang Qian1,3,4, Yilong Zhao2, Yanan Sun2, Rui Yang1 and Li Jiang2,3
1University of Michigan-Shanghai Jiao Tong University Joint Institute, Shanghai Jiao Tong University, Shanghai, China
2School of Electronic, Information, and Electrical Engineering, Shanghai Jiao Tong University, Shanghai, China
3MoE Key Laboratory of Artificial Intelligence, Shanghai Jiao Tong University, Shanghai, China
4State Key Laboratory of ASIC & System, Fudan University, Shanghai, China
ABSTRACT
Resistance variation in memristor device hinders the practical use of resistive random access memory (RRAM) crossbars as neural network (NN) accelerators. Previous faulttolerant methods cannot effectively handle cycle-to-cycle variation (CCV). Many of them also use a pair of positive-weight and negative-weight crossbars to store a weight matrix, which implicitly enhances the fault tolerance but doubles the hardware cost. This paper proposes a novel solution that dramatically reduces the NN accuracy loss under CCV, while still using a single crossbar to store a weight matrix. The key idea is to introduce digital offsets into the crossbar, which further enables two techniques to conquer CCV. The first is a variation-aware weight optimization method that determines the optimal target weights to be written into the crossbar; the second is a post-writing tuning method that optimally sets the digital offsets to recover the accuracy loss due to variation. Simulation results show that the accuracy maintains the ideal value for LeNet with MNIST and only drops by 2.77% over the ideal value for ResNet-18 with CIFAR-10 under a large resistance variation. Moreover, compared to state-of-the-art faulttolerant methods, our method achieves a better NN accuracy with at least 50% fewer crossbars.
Keywords: RRAM, Unreliable Device, Cycle-To-Cycle Variation, Neural Network, Digital Offset.
