Improving the Timing Behaviour of Mixed-Criticality Systems Using Chebyshev’s Theorem
Behnaz Ranjbar1,2,a, Ali Hoseinghorbany2,d, Siva Satyendra Sahoo1,b, Alireza Ejlali2,e, and Akash Kumar1,c
1Chair for Processor Design, CFAED, Technische Universität Dresden, Dresden, Germany
2Embedded System Research Laboratory (ESRLab), Sharif University of Technology, Tehran, Iran
abehnaz.ranjbar@tu-dresden.de
bsiva_satyendra.sahoo@tu-dresden.de
cakash.kumar@tu-dresden.de
dhoseinghorban@ce.sharif.edu
eejlali@sharif.edu
ABSTRACT
In Mixed-Criticality (MC) systems, there are often multiple Worst-Case Execution Times (WCETs) for the same task, corresponding to system operation mode. Determining the appropriate WCETs for lower criticality modes is non-trivial; while on the one hand, a low WCET for a mode can improve the processor utilization in that mode, on the other hand, using a larger WCET ensures that the mode switches are minimized, thereby maximizing the quality-of-service for all tasks, albeit at the cost of processor utilization. Although there are many studies to determine WCET in the highest criticality mode, no analytical solutions are proposed to determine WCETs in other lower criticality modes. In this regard, we propose a scheme to determine WCETs by Chebyshev theorem to make a trade-off between the number of scheduled tasks at design-time and the number of dropped low-criticality tasks at runtime as a result of frequent mode switches. Our experimental results show that our scheme improves the utilization of state-of-the-art MC systems by up to 85.29%, while maintaining 9.11% mode switching probability in the worst-case scenario.
Keywords: Mixed-Criticality, Mode Switching Probability, Resource Utilization, Schedulability, WCETs’ Analysis.
