Computing with Ferroelectric FETs: Devices, Models, Systems, and Applications
Ahmedullah Aziz1,a, Evelyn T. Breyer6,k, An Chen2, Xiaoming Chen3, Suman Datta4,e, Sumeet Kumar Gupta1,b, Michael Hoffmann6,l, Xiaobo Sharon Hu4,f, Adrian Ionescu5, Matthew Jerry4,g, Thomas Mikolajick6,8,n,p, Halid Mulaosmanovic6,m, Kai Ni4,h, Michael Niemier4,i, Ian O’Connor7, Atanu Saha1,c, Stefan Slesazeck6,n, Sandeep Krishna Thirumala1,d and Xunzhao Yin4,j
1Purdue University, USA
aaziz5@purdue.edu
bguptask@purdue.edu
csaha26@purdue.edu
dsthirum@purdue.edu
2Semiconductor Research Corporation, USA
An.Chen@src.org
3State Key Laboratory of Computer Architecture, Institute of Computing Technology, Chinese Academy of Sciences, China
chenxiaoming@ict.ac.cn
4University of Notre Dame, USA
esdatta@nd.edu
fshu@nd.edu
gmjerry@nd.edu
hkni@nd.edu
imniemier@nd.edu
jxyin1@nd.edu
5Ećole polytechnique fedeŕale de Lausanne (EPFL), Switzerland
adrian.ionescu@epfl.ch
6NaMLab GmbH, Germany
kEvelyn.Breyer@namlab.com
lMichael.Hoffmann@namlab.com
mHalid.Mulaosmanovic@namlab.com
nThomas.Mikolajick@namlab.com
oStefan.Slesazeck@namlab.com
7Ecole Centrale de Lyon, France
Ian.Oconnor@ec-lyon.fr
8IHM TU-Dresden, Germany
pthomas.mikolajick@tu-dresden.de
ABSTRACT
In this paper, we consider devices, circuits, and systems comprised of transistors with integrated ferroelectrics. Said structures are actively being considered by various semiconductor manufacturers as they can address a large and unique design space. Transistors with integrated ferroelectrics could (i) enable a better switch (i.e., offer steeper subthreshold swings), (ii) are CMOS compatible, (iii) have multiple operating modes (i.e., I‐V characteristics can also enable compact, 1‐transistor, nonvolatile storage elements, as well as analog synaptic behavior), and (iv) have been experimentally demonstrated (i.e., with respect to all of the aforementioned operating modes). These devicelevel characteristics offer unique opportunities at the circuit, architectural, and system‐level, and are considered here from device, circuit/architecture, and foundry‐level perspectives.
