Using Multifunctional Standardized Stack as Universal Spintronic Technology for IoT
M. Tahoori1, S.M. Nair1, R. Bishnoi1, S. Senni2, J. Mohdad2, F. Mailly2, L. Torres2, P. Benoit2, A. Gamatie2, P. Nouet2, F. Ouattara2, G. Sassatelli2, K. Jabeur3, P. Vanhauwaert3, A. Atitoaie4, I.Firastrau4, G. Di Pendina3 and G. Prenat3
1Karlsruhe Institute of Technology, Germany
2LIRMM, UMR CNRS 5506, University of Montpellier, France
3Univ. Grenoble Alpes, CNRS, CEA, INAC‐SPINTEC, F‐38000 Grenoble, France
4Transilvania University of Brasov, 29 B‐dul Eroilor, 500036 Brasov, Romania
ABSTRACT
For monolithic heterogeneous integration, fast yet low‐power processing and storage, and high integration density, the objective of the EU GREAT project is to co‐integrate multiple digital and analog functions together within CMOS by adapting the Magnetic Tunneling Junctions (MTJs) into a single baseline technology enabling logic, memory, and analog functions, particularly for Internet of Things (IoT) platforms. This will lead to a unique STT‐MTJ cell technology called Multifunctional Standardized Stack (MSS). This paper presents the progress in the project from the technology, compact modeling, process design kit, standard cells, as well as memory and system level design evaluation and exploration. The proposed technology and toolsets are giant leaps towards heterogeneous integrated technology and architectures for IoT.
