A Boolean Model for Delay Fault Testing of Emerging Digital Technologies based on Ambipolar Devices
Marcello Dalpasso1, Davide Bertozzi2,a and Michele Favalli2,b
1DEI ‐ University of Padova, Italy
marcello.dalpasso@unipd.it
2DI ‐ University of Ferrara, Italy
adavide.bertozzi@unife.it
bmichele.favalli@unife.it
ABSTRACT
Emerging nanotechnonologies such as ambipolar carbon nanotube field effect transistors (CNTFETs) and silicon nanowire FETs (SiNFETs) provide ambipolar devices allowing the design of more complex logic primitives than those found in today’s typical CMOS libraries. When switching, such devices show a behavior not seen in simpler CMOS and FinFET cells, making unsuitable the existing delay fault testing approaches. We provide a Boolean model of switching ambipolar devices to support delay fault testing of logic cells based on such devices both in Boolean and Pseudo‐Boolean satisfiability engines.
