Cache-Aware Task Scheduling for Maximizing Control Performance

Wanli Chang1, Debayan Roy2, Xiaobo Sharon Hu3 and Samarjit Chakraborty1
1Infocomm Technology Cluster, Singapore Institute of Technology
2Chair of Real-Time Computer Systems, TU Munich
3University of Notre Dame

ABSTRACT


Embedded control applications are widely implemented on small, low‐cost and resource‐constrained microcontrollers, e.g., in the automotive domain. Conventionally, control algorithms are designed using model‐based approaches, without considering the details of the implementation platform. This leads to inefficient utilization of the resources. With the emergence of the cyber‐physical system (CPS)‐oriented thinking, there has lately been a strong interest in co‐design of control algorithms and their implementation platforms. Some recent efforts have shown that a schedule on multiple applications with more onchip cache reuse is able to improve the control performance. However, it has not been studied how the control performance can be maximized for a given schedule and how an optimal schedule can be computed. In this work, we propose a two stage framework to compute the schedule maximizing the overall control performance of all the applications. First, a holistic controller design taking all the sampling periods and sensing to actuation delays in a schedule into account is presented, aiming to maximize the overall control performance. Second, a hybrid search algorithm for discrete decision space is reported to efficiently compute an optimal schedule. Experimental results on a case study with multiple automotive applications show that a significant improvement of 10‐20% in control performance can be achieved by the proposed cache-aware scheduling approach.



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