In‐growth Test for Monolithic 3D Integrated SRAM
Pu Pang1, Yixun Zhang1, Tianjian Li1, Sung Kyu Lim2, Quan Chen1, Xiaoyao Liang1 and Li Jiang1
1Shanghai Jiao Tong University, Shanghai, China
2Georgia Institute of Technology, Atlanta, Georgia, USA
ABSTRACT
Monolithic three‐dimensional integration (M3I) directly fabricates tiers of integrated circuits upon each other and provides millions of vertical interconnections with interlayer vias (ILVs). It thus brings higher integration density and communication capability compared with three‐dimensional stacked integration (3D‐SI). However, the Known‐Good‐Die problem haunting 3D‐SI‐a faulty tier causes the failure of the entire stack‐also occurs in M3I. Lack of efficient test methodologies such as the pre‐bond testing in 3D‐SI, M3I may have a more significant yield drop and thus its cost may be unacceptable for main-stream adoption. This paper introduces a novel In‐growth test method for M3I SRAM. We propose a novel Design‐for‐ Test (DfT) methodology to enable the proposed In‐growth test on cell‐level partitioned incomplete SRAM cells. We also build a statistical model of cost and discover a prospective judgement to determine whether or not to stop the fabrication, in order to prevent from raising the cost of fabricating more tiers upon the irreparable tiers. We find that a "sweet point" exists in the judgement, which can minimize the overall cost. Experimental results show the effectiveness of our proposed test methodology.
