Organisers

Dr.-Ing. Diana Göhringer

Dr.-Ing. Göhringer works since 2001 in the domain of reconfigurable hardware. She graduated from the University of Karlsruhe in 2006 and finished her PhD at the Karlsruhe Institute of Technology (KIT) in 2011 with "summa cum laude". Since 2012, she leads the Young Investigator Group "CADEMA" at the KIT, where she focuses specifically on reconfigurable computing and multicore architectures. Dr. Göhringer is main- and coauthor of more than 40 highly relevant scientific papers in conferences, journals and book chapters.

Prof. Dr.-Ing. habil. Michael Hübner

Prof. Hübner is the Chair of Embedded Systems in Information Technology at the Ruhr-University of Bochum. He graduated at the University of Karlsruhe in 2003 and received his PhD in 2007 from the same University. He finished his habilitation in "reconfigurable computing systems" in 2011 at the Karlsruhe Institute of Technology (KIT). Prof. Hübner works since more than a decade in the domain of reconfigurable computing and is main- and coauthor of more than 130 scientific publications in highly relevant conference proceedings, journals and book chapters.

Description

Reconfigurable computing gained interest in the scientific and industrial community many years ago. It targeted the substitution of application specific integrated circuits (ASICs) by offering additional benefits, such as flexibility at design- and runtime. Since this time, various trends were followed and led to different generalizations and specializations e.g. through the offer of specific chips with more digital signal processing units or more logic cells or even embedded processors such as the Power PC 405 in Xilinx Virtex II Pro Field Programmable Gate Array (FPGA). In the meanwhile, other technologies such as Graphic Processing Units (GPUs) entered the marked and established themselves in the domain of high performance computing and nowadays also in embedded computing. However, the vendors of FPGAs continued improving the architectures, and the technology of their devices as well as the design tools and programming environments. Novel high performance architectures such as the Xilinx Zynq or Microsemi Smart Fusion, tailored for the embedded market, are some examples that the FPGA market is still growing. Virtual development platforms such as provided e.g. from Cadence enable an efficient design of complex systems without building a prototype in early stages of the development phase. Especially, this example shows how former hurdles will be bridged by introducing novel development tools for the chips which could be programmed in former times only by specialists. The introduction of novel technologies like MRAM, FRAM and also MEMRISTOR will further revolutionize the FPGA hardware and lead to a new era of reconfigurable computing.

This workshop will enable participants to take part in the most novel technology, architecture and design tools provided by the key players, but also from small and medium enterprises and researchers working at the cutting edge of technology. The unique constellation of the speakers which have sufficient time to talk about the novel chips will enable a deep insight into a promising reconfigurable computing future.

Confirmed speakers

• Dr. Ivo Bolsens, CTO Xilinx Inc., San Jose, US
• Steven Perry, Software Tools Architect, Altera, High Wycombe, UK
• Dr. Laurent Rougé, CEO and founder of Menta, Montpellier, FR
• Prof. Ahmed Jerraya, CEA Leti, Grenoble, FR
• Dr. Hichem Belhadj, VP Sales at Microsemi, US

Agenda

Agenda

Further infromation is availabel at the workshop website.