Date: Wednesday 20 March 2013
Time: 11:00 - 12:30
Location / Room: Chartreuse

Chair:
Andreas Moshovos, University of Toronto , CA

Co-Chair:
Georgi Gaydadjiev, Chalmers University of Technology, SE

This session presents a collection of papers that advances design space exploration for application-specific customization. The first paper proposes an analytical meta-model for area and delay to predict the quality of the design points in co-processor synthesis leading to significant speed-up in the design space exploration process. The second paper designs an application-specific customization of memory hierarchy for multi-view video coding. The final paper in this session employs an analytical model to reduce the number of cycle-accurate simulations for exploration of many-core embedded platforms.

Time	Label	Presentation Title Authors
11:00	6.4.1	A META-MODEL ASSISTED COPROCESSOR SYNTHESIS FRAMEWORK FOR COMPILER/ARCHITECTURE PARAMETERS CUSTOMIZATION Authors: Sotirios Xydis, Gianluca Palermo, Vittorio Zaccaria and Cristina Silvano, Politecnico di Milano, IT Abstract
11:30	6.4.2	ENERGY-EFFICIENT MEMORY HIERARCHY FOR MOTION AND DISPARITY ESTIMATION IN MULTIVIEW VIDEO CODING Authors: Felipe Sampaio1, Bruno Zatt2, Muhammad Shafique2, Luciano Agostini3, Sergio Bampi1 and Jörg Henkel2 1Federal University of Rio Grande do Sul, BR; 2Karlsruhe Institute of Technology, DE; 3Federal University of Pelotas, BR Abstract
12:00	6.4.3	IMPROVING SIMULATION SPEED AND ACCURACY FOR MANY-CORE EMBEDDED PLATFORMS WITH ENSEMBLE MODELS Authors: Edoardo Paone1, Nazanin Vahabi1, Vittorio Zaccaria1, Cristina Silvano1, Diego Melpignano2, Germain Haugou2 and Thierry Lepley2 1Politecnico di Milano, IT; 2STMicroelectronics, FR Abstract
12:30	IP3-2, 420	STATICALLY-SCHEDULED APPLICATION-SPECIFIC PROCESSOR DESIGN: A CASE-STUDY ON MMSE MIMO EQUALIZATION Authors: Mostafa Rizk1, Amer Baghdadi2, Michel Jezequel2, Yasser Mohana3 and Youssef Atat3 1Telecom Bretagne, Lebanese University, FR; 2Telecom Bretagne, FR; 3Lebanese University, LB Abstract
12:31	IP3-3, 795	EXPLORING RESOURCE MAPPING POLICIES FOR DYNAMIC CLUSTERING ON NOC-BASED MPSOCS Authors: Gustavo Girao, Thiago Santini and Flavio Wagner, Federal University of Rio Grande do Sul, BR Abstract
12:32	IP3-4, 569	CHARACTERIZING THE PERFORMANCE BENEFITS OF FUSED CPU/GPU SYSTEMS USING FUSIONSIM Authors: Vitaly Zakharenko1, Tor Aamodt2 and Andreas Moshovos1 1University of Toronto, CA; 2University of British Columbia, CA Abstract
12:30		End of session Lunch Break in Ecrins Sandwich lunch (Eat early for High-Performance Low-Power Computing - Energy Efficient Computing Keynote - Room Oisans at 1330; http://www.date-conference.com/conference/session/7.0)