Date: Wednesday 20 March 2013
Time: 16:00 - 16:30
Location / Room: Exhibition Hall (espace accueil)

Interactive Presentations run simulatenously during a 30-minute slot. A poster associated to the IP paper is on display throughout the afternoon. Additionally, each IP paper is briefly introduced in a one-minute presentation in a corresponding regular session, prior to the actual Interactive Presentation.

Label	Presentation Title Authors
IP3-1	HYPERVISED TRANSIENT SPICE SIMULATIONS OF LARGE NETLISTS & WORKLOADS ON MULTI-PROCESSOR SYSTEMS Authors: Grigorios Lyras, Dimitrios Rodopoulos, Antonis Papanikolaou and Dimitrios Soudris, NTUA-ECE-MicroLab, GR Abstract
IP3-2	STATICALLY-SCHEDULED APPLICATION-SPECIFIC PROCESSOR DESIGN: A CASE-STUDY ON MMSE MIMO EQUALIZATION Authors: Mostafa Rizk1, Amer Baghdadi2, Michel Jezequel2, Yasser Mohana3 and Youssef Atat3 1Telecom Bretagne, Lebanese University, FR; 2Telecom Bretagne, FR; 3Lebanese University, LB Abstract
IP3-3	EXPLORING RESOURCE MAPPING POLICIES FOR DYNAMIC CLUSTERING ON NOC-BASED MPSOCS Authors: Gustavo Girao, Thiago Santini and Flavio Wagner, Federal University of Rio Grande do Sul, BR Abstract
IP3-4	CHARACTERIZING THE PERFORMANCE BENEFITS OF FUSED CPU/GPU SYSTEMS USING FUSIONSIM Authors: Vitaly Zakharenko1, Tor Aamodt2 and Andreas Moshovos1 1University of Toronto, CA; 2University of British Columbia, CA Abstract
IP3-5	RELIABILITY ANALYSIS FOR INTEGRATED CIRCUIT AMPLIFIERS USED IN NEURAL MEASUREMENT SYSTEMS Authors: Nico Hellwege, Nils Heidmann, Dagmar Peters-Drolshagen and Steffen Paul, University of Bremen, DE Abstract
IP3-6	ON-LINE TESTING OF PERMANENT RADIATION EFFECTS IN RECONFIGURABLE SYSTEMS Authors: Luca Cassano1, Dario Cozzi2, Sebastian Korf2, Jens Hagemeyer2, Mario Porrmann2 and Luca Sterpone3 1University of Pisa, IT; 2Bielefeld University, DE; 3Politecnico di Torino, IT Abstract
IP3-7	AN APPROACH FOR REDUNDANCY IN FLEXRAY NETWORKS USING FPGA PARTIAL RECONFIGURATION Authors: Shanker Shreejith1, Kizheppatt Vipin1, Suhaib A Fahmy1 and Martin Lukasiewycz2 1Nanyang Technological University, SG; 2TUM CREATE, SG Abstract
IP3-8	FAST CONE-OF-INFLUENCE COMPUTATION AND ESTIMATION IN PROBLEMS WITH MULTIPLE PROPERTIES Authors: Carmelo Loiacono1, Marco Palena1, Paolo Pasini1, Denis Patti1, Stefano Quer1, Stefano Ricossa1, Danilo Vendraminetto1 and Jason Baumgartner2 1Politecnico di Torino, IT; 2IBM Research, US Abstract
IP3-9	USING CUBES OF NON-STATE VARIABLES WITH PROPERTY DIRECTED REACHABILITY Authors: John Backes and Marc Riedel, University of Minnesota, US Abstract
IP3-10	BRIDGING THE GAP BETWEEN DUAL PROPAGATION AND CNF-BASED QBF SOLVING Authors: Alexandra Goultiaeva1, Martina Seidl2 and Armin Biere2 1University of Toronto, CA; 2Johannes Kepler University, AT Abstract
IP3-11	DANCE: DISTRIBUTED APPLICATION-AWARE NODE CONFIGURATION ENGINE IN SHARED RECONFIGURABLE SENSOR NETWORKS Authors: Chih-Ming Hsieh, Zhonglei Wang and Jörg Henkel, Karlsruhe Institute of Technology, DE Abstract
IP3-12	HYBRID INTERCONNECT DESIGN FOR HETEROGENEOUS HARDWARE ACCELERATORS Authors: Cuong Pham-Quoc1, Jan Heisswolf2, Stephan Werner2, Zaid Al-Ars1, Jürgen Becker2 and Koen Bertels1 1Delft University of Technology, NL; 2Karlsruhe Institute of Technology, DE Abstract
IP3-13	SPAC: A SEGMENT-BASED PARALLEL COMPRESSION FOR BACKUP ACCELERATION IN NONVOLATILE PROCESSORS Authors: Xiao Sheng, Yiqun Wang, Yongpan Liu and Huazhong Yang, Tsinghua University, CN Abstract
IP3-14	THE DESIGN OF SUSTAINABLE WIRELESS SENSOR NETWORK NODE USING SOLAR ENERGY AND PHASE CHANGE MEMORY Authors: Ping Zhou1, Youtao Zhang2 and Jun Yang2 1Intel, US; 2University of Pittsburgh, US Abstract
IP3-15	OPTICAL LOOK UP TABLE Authors: Zhen Li, Sébastien Le Beux, Christelle Monat, Xavier Letartre and Ian O'Connor, Lyon Institute of Nanotechnology, FR Abstract
IP3-16	A VERILOG-A MODEL FOR RECONFIGURABLE LOGIC GATES BASED ON GRAPHENE PN-JUNCTIONS Authors: Sandeep Miryrala, Mehrdad Montazeri, Andrea Calimera, Enrico Macii and Massimo Poncino, Politecnico di Torino, IT Abstract
IP3-17	A SURVY OF MULTI-SOURCE ENERGY HARVESTING SYSTEMS Authors: Alex S. Weddell1, Michele Magno2, Davide Brunelli3, Geoff V. Merrett1, Bashir M. Al-Hashimi1 and Luca Benini2 1University of Southampton, UK; 2University of Bologna, IT; 3University of Trento, IT Abstract
IP3-18	CAPITAL COST-AWARE DESIGN AND PARTIAL SHADING-AWARE ARCHITECTURE OPTIMIZATION OF A RECONFIGURABLE PHOTOVOLTAIC SYSTEM Authors: Yanzhi Wang1, Xue Lin1, Jaemin Kim2, Naehyuck Chang2 and Massoud Pedram1 1University of Southern California, US; 2Seoul National University, KR Abstract
IP3-19	AN ULTRA-LOW POWER HARDWARE ACCELERATOR ARCHITECTURE FOR WEARABLE COMPUTERS USING DYNAMIC TIME WARPING Authors: Reza Lotfian and Roozbeh Jafari, University of Texas at Dallas, US Abstract
IP3-20	EFFICIENT CACHE ARCHITECTURES FOR RELIABLE HYBRID VOLTAGE OPERATION USING EDC CODES Authors: Bojan Maric1, Jaume Abella2 and Mateo Valero1 1Barcelona Supercomputing Center and Universitat Politècnica de Catalunya, ES; 2Barcelona Supercomputing Center, ES Abstract
IP3-21	IMPROVING FAULT TOLERANCE USING HARDWARE-SOFTWARE-CO-SYNTHESIS Authors: Heinz Riener1, Stefan Frehse1 and Goerschwin Fey2 1University Bremen, DE; 2German Aerospace Center, DE Abstract
IP3-22	A DYNAMIC SELF-ADAPTIVE CORRECTION METHOD FOR ERROR RESILIENT APPLICATION Authors: Luming Yan, Huaguo Liang and Zhengfeng Huang, Hefei University of Technology, CN Abstract