A Cryo-CMOS Transmon Qubit Controller and Verification with FPGA Emulation
Kevin Tien1, Ken Inoue1, Scott Lekuch1, David J. Frank1, Sudipto Chakraborty1, Pat Rosno2, Thomas Fox1, Mark Yeck1, Joseph A. Glick1, Raphael Robertazzi1, Ray Richetta2, John F. Bulzacchelli1, Daniel Ramirez2, Dereje Yilma2, Andrew Davies2, Rajiv V. Joshi1, Devin Underwood1, Dorothy Wisnieff1, Chris Baks1, Donald Bethune3 , John Timmerwilke1, Blake R. Johnson1, Brian P. Gaucher1 and Daniel J. Friedman1
1IBM T. J. Watson Research Center, Yorktown Heights NY, USA
2IBM Systems, Rochester MN, USA
3IBM Almaden Research Center, San Jose CA, USA
ABSTRACT
Future generations of quantum computers are expected to operate in a paradigm where multi-qubit devices will predominantly perform circuits to support quantum error correction. Highly integrated cryogenic electronics are a key enabling technology to support the control of the large numbers of physical qubits that will be required in this fault-tolerant, error-corrected regime. Here, we describe our perspectives on cryoelectronics-driven qubit control architectures, and will then describe an implementation of a scalable, low-power, cryogenic qubit state controller that includes a domain-specific processor and a SSB upconversion I/Q-mixer-based RF AWG. We will also describe an FPGA-based emulation platform that is able to closely reproduce the system intention, and which was used to verify different aspects of the ASIC system design in in situ transmon qubit control experiments.
Keywords: Quantum Computing, Superconducting Qubits, Cryo-Cmos, Fpga Emulation.
