SafeSU-2: a Safe Statistics Unit for Space MPSoCs
Guillem Cabo1, Sergi Alcaide1,2, Carles Hernández3, Pedro Benedicte1, Francisco Bas1,2, Fabio Mazzocchetti1 and Jaume Abella1
1Barcelona Supercomputing Center (BSC)
2Universitat Politècnica de Catalunya (UPC)
3Universitat Politècnica de València (UPV)
ABSTRACT
Advanced statistics units (SUs) have been proven effective for the verification, validation and implementation of safety measures as part of safety-related MPSoCs. This is the case, for instance, of the RISC-V MPSoC by CAES Gaisler based on NOEL-V cores that will become commercially ready on FPGAs by the end of 2022. However, while those SUs support safety in the rest of the SoC, they must be built to be safe to be part of commercial products.
This paper presents the SafeSU-2, the safety-compliant version of the SafeSU. In particular, we perform a Failure Mode and Effect Analysis (FMEA) for the SafeSU for relevant fault models, and implement fault detection and tolerance features needed to make it compliant with the requirements of safety-related devices in general, and of space MPSoCs in particular.
