DWR: Differential Wearing for Read Performance Optimization on High-Density NAND Flash Memory
Yunpeng Song2, Qiao Li4, Yina Lv2, Changlong Li2 and Liang Shi1,2,3
1Software/Hardware Co-design Engineering Research Center, Ministry of Education, Shanghai, China
2School of Computer Science and Technology, East China Normal University, Shanghai, China
3Wuhan National Laboratory for Optoelectronics, Huazhong University of Science and Technology, Wuhan, Hubei, China
4Department of Computer Science, City University of Hong Kong, Hong Kong, China
ABSTRACT
With the cost reduction and density optimization, the read performance and lifetime of high-density NAND flash memory have been significantly degraded during the last decade. Previous works proposed to optimize lifetime with wear leveling and optimize read performance with reliability improvement. However, with wearing, the reliability and read performance will be degraded along with the life of the device. To solve this problem, a differential wearing scheme (DWR) is proposed to optimize the read performance. The basic idea of DWR is to partition the flash memory into two areas and wear them at different speeds. For the area with low wearing speed, read operations are scheduled for read performance optimization. For the area with high wearing speed, write operations are scheduled but designed to avoid generating bad blocks early. Through careful design and real workloads evaluation on 3D TLC NAND flash, DWR achieves encouraging read performance optimization with negligible impacts to the lifetime.
