Reconfigurable Threshold Logic Gates using Optoelectronic Capacitors

Ragh Kuttappa1,a, Lunal Khuon2, Bahram Nabet1,b and Baris Taskin1,c
1Drexel University, ECE Department, Philadelphia, PA 19104, USA.
2Drexel University, Department of Engineering Technology, Philadelphia, PA 19104, USA.


This paper investigates the integration of optoelectronic devices with CMOS to implement reconfigurable threshold logic gates for Boolean functions. The weight of the optoelectronic device can be altered by changing the optical power which is used to reconfigure the threshold logic (TL) gate. These novel reconfigurable gates are called the optoelectronic capacitor based TL (OECTL) gates. The OECTL gates are designed for i) simplistic AND/NAND gates and OR/NOR gates with large fan-in and ii) linearly separable Boolean functions that can be reconfigured to other linearly separable Boolean functions, constrained in reconfiguration by the specifics of TL operation. SPICE simulations in 65nm bulk CMOS technology with a Verilog-A model for the optoelectronic capacitor demonstrate i) AND/NAND gates and OR/NOR gates are 2x faster as fan-in goes above 3 and consumes low power and ii) Boolean functions can be reconfigured with 0.58xsmaller delay and 0.46x less power of standard CMOS design.

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