DATE 2016 Awards Ceremony
EDAA Achievement Award
Giovanni De Micheli
École Polytechnique Fédérale de Lausanne, CH
In recognition of outstanding contributions to EDA and its community
DATE 2016 Best Paper Awards
Each year the Design, Automation and Test in Europe Conference presents awards to the authors of the best papers. The selection is performed by an award committee, based on the results of the reviewing process and the quality of the final paper.
D Track
UTILIZING MACROMODELS IN FLOATING RANDOM WALK BASED CAPACITANCE EXTRACTION
Wenjian Yu1, Bolong Zhang1, Chao Zhang1, Haiquan Wang1 and Luca Daniel2
1Tsinghua University, CN; 2Massachusetts Institute of Technology (MIT), US
A Track
OTEM: OPTIMIZED THERMAL AND ENERGY MANAGEMENT FOR HYBRID ELECTRICAL ENERGY STORAGE IN ELECTRIC VEHICLES
Korosh Vatanparvar and Mohammad Abdullah Al Faruque, University of California, Irvine, US
T Track
MODELING FABRICATION NON-UNIFORMITY IN CHIP-SCALE SILICON PHOTONIC INTERCONNECTS
Mahdi Nikdast1, Gabriela Nicolescu2, Jelena Trajkovic3 and Odile Liboiron-Ladouceur4
1Polytechnique Montréal and McGill University, CA; 2Polytechnique Montréal, CA;3Concordia University, CA; 4McGill University, CA
E Track
PROBABILISTIC WCET ESTIMATION IN PRESENCE OF HARDWARE FOR MITIGATING THE IMPACT OF PERMANENT FAULTS
Damien Hardy1, Isabelle Puaut1 and Yiannakis Sazeides2
1University of Rennes 1/IRISA, FR; 2University of Cyprus, CY
EDAA Outstanding Dissertation Award 2015
Recognizing the importance of university research to the advancement of design, automation and test.
- Each award consists of a 1,000 € prize and a certificate.
- SPRINGER publishes these awarded dissertations in the EDAA Outstanding Monographs series.
Category “New Directions in Embedded System Design and Embedded Software”
FROM VARIABILITY-TOLERANCE TO APPROXIMATE COMPUTING IN PARALLEL COMPUTING ARCHITECTURES
Abbas Rahimi, Ph.D., UCSD, US
Advisors: Prof. Rajesh K. Gupta and Prof. Luca Benini
Category “New Directions in Logic and System Design”
NEW DATA STRUCTURES AND ALGORITHMS FOR LOGIC SYNTHESIS AND VERIFICATION
Luca Gaetano Amarú, Ph.D., EPFL, CH
Advisors: Prof. Giovanni De Micheli and Prof. Andreas P. Burg
Category “New Directions in Physical Design, Design for Manufacturing and CAD for Analogue Circuits and MEMS”
ALGORITHM PARALLELIZATION AND ARCHITECTURE OPTIMIZATION FOR IRREGULAR PROBLEMS
Xiaoming Chen, Ph.D., Tsinghua University, CN
Advisor: Prof. Huazhong Yang
Category “New Directions in Circuit and System Test”
QED POST-SILICON VALIDATION AND DEBUG
David Hai Lin, Ph.D., Stanford University, US
Advisor: Prof. Subhasish Mitra
IEEE Fellow Award
David Atienza Alonso
École Polytechnique Fédérale de Lausanne, CH
For contributions to design methods and tools for multiprocessor systems on chip
DATE Fellow Awards
Bob Gardner
Ececutive Director of Electronic Design Automation Consortium, US
For long term significant contributions to the success of DATE
Wolfgang Nebel
University of Oldenburg and OFFIS, DE
For outstanding service contribution for DATE as General Chair of DATE 2015
IEEE CEDA Service Award
Wolfgang Nebel
University of Oldenburg and OFFIS, DE
For outstanding service contribution for DATE as General Chair of DATE 2015
IEEE CS TTTC Outstanding Contribution Award
Wolfgang Nebel
University of Oldenburg and OFFIS, DE
For outstanding service contribution for DATE as General Chair of DATE 2015
DATE 2016 Best Interactive Presentation Award
ANALYZING THE IMPACT OF INJECTED SENSOR DATA ON AN ADVANCED DRIVER ASSISTANCE SYSTEM USING THE OP2TIMUS PROTOTYPING PLATFORM
Alexander Stühring1, Günter Ehmen1 and Sibylle Fröschle2
1University of Oldenburg, DE; 2OFFIS Institute for Information Technology, DE
