W09 International Workshop on Optical/Photonic Interconnects for Computing Systems (OPTICS Workshop)

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Agenda

TimeLabelSession
08:30W09.1Introduction

Chair:
Gabriela Nicolescu, Ecole Polytechnique de Montreal, CA

08:30W09.1.1Introduction to OPTICS workshop
Gabriela Nicolescu1 and Mahdi Nikdast2
1Ecole Polytechnique de Montreal, CA; 2Ecole Polytechnique de Montréal, CA

08:40W09.2Morning Session on System Design, Architecture, Modelling, and Applications

Chair:
Sébastien Le Beux, Lyon Institute of Nanotechnology, Ecole Centrale de Lyon, FR

08:40W09.2.1Scalable Optical Interconnects for Computing Systems and the Need for Electro-Optical Integration
Antonio La Porta, IBM, Zurich Research Laboratory, CH

09:15W09.2.2Towards a Vertically Integrated Synthesis Flow for Predictable Design of Wavelength-Routed Optical NoCs
Davide Bertozzi, University of Ferrara, IT

09:35W09.2.3Inter/Intra-Chip Optical Networks: Opportunities and Challenges
Jiang Xu, Hong Kong University of Science and Technology, CN

09:55W09.2.4A Force-Directed Placement Algorithm for 3D Optical Networks-on-Chip
Anja von Beuningen and Ulf Schlichtmann, Technische Universität München, DE

10:15W09.2.5System-Level Design Space Exploration for SoCs Integrating Optical Networks on Chip
Fabiano Hessel, Pontifícia Universidade Católica do Rio Grande do Sul, BR

10:35W09.2.6Coffee break

11:00W09.2.7Meet in the Middle: Leveraging Optical Interconnection Opportunities in Chip Multi Processors
Sandro Bartolini, Università di Siena, IT

11:20W09.2.8Electronic vs Photonic NoCs: Should They Compete or Collaborate?
Josè Flich, Universidad Politecnica de Valencia, ES

11:40W09.2.9Bandwidth Requirements in Manycore Architectures: What Can 3D Bring?
Olivier Sentieys, INRIA - University of Rennes 1, FR

12:00W09.2.10Lunch

13:00W09.3Afternoon Session on Silicon Photonics Devices, Circuits, and Challenges

Chair:
Jiang Xu, Hong Kong University of Science and Technology, CN

13:00W09.3.1Building a Scalable Design Environment for Silicon Photonics through PDKs
John Ferguson, Mentor Graphics Corp, US

13:35W09.3.2Recent Development of Si-Photonics in 300mm Fab
Sebastien Cremer, STMicroelectronics, FR

13:55W09.3.3Silicon Photonics for Interposer
Yvain Thonnart, CEA, LETI, MINATEC, FR

14:15W09.3.4Thermal Management of Optical Interconnects
Yaoyao Ye, Huawei Technologies Co. Ltd., CN

14:35W09.3.5Coffee break

15:00W09.3.6Parametric Exploration of Vertical Tapered Coupler for 3D Optical Interconnection
Romain Schuster1, Alberto Parini2 and Gaetano Bellanca2
1Telecom Bretagne, Campus Brest, FR; 2University of Ferrara, IT

15:20W09.3.7The Last Mile? Remaining Challenges in Optical Interconnect
Ian O'Connor, Lyon Institute of Nanotechnology, FR

15:30W09.4Panel

Moderator:
Ian O'Connor, Lyon Institute of Nanotechnology, FR

Panelists:
Panelists:
John Ferguson1, Antonio La Porta2, Gabriela Nicolescu3, Olivier Sentieys4, Davide Bertozzi5 and Jiang Xu6
1Mentor Graphics Corp, US; 2IBM, Zurich Research Laboratory, CH; 3Ecole Polytechnique de Montreal, CA; 4INRIA - University of Rennes 1, FR; 5University of Ferrara, IT; 6Hong Kong University of Science and Technology, CN
16:20W09.5Concluding Remarks and Closing Session

Chair:
Sébastien Le Beux, Lyon Institute of Nanotechnology, Ecole Centrale de Lyon, FR

16:20W09.5.1Concluding remarks
Sébastien Le Beux, Lyon Institute of Nanotechnology, Ecole Centrale de Lyon, FR

16:30W09.5.2Closing