W06 Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale (MEDIAN)
Agenda
| Time | Label | Session |
|---|---|---|
| 08:30 | W06.1 | Opening session Co-Chairs: |
| 08:30 | W06.1.1 | Welcome presentation |
| 08:40 | W06.2 | Keynote Chair: |
| 08:40 | W06.2.1 | Reliability Challenges for Cyber-Physical Systems Zebo Peng, Linköping University, SE |
| 09:40 | W06.3 | Paper session I: Fault Tolerance and Test Techniques for Low Power Design Chair: |
| 09:40 | W06.3.1 | BTI Analysis for High Performance and Low power SRAM Sense Amplifier Designs Innocent Agbo1, Mottaqiallah Taouil1, Said Hamdioui2, Halil Kukner3, Pieter Weckx4, Praveen Raghavan3 and Francky Catthoor3 1Delft UT, NL; 2Delft University of Technology, NL; 3IMEC, BE; 4IMEC vzw, BE |
| 10:00 | W06.3.2 | Power-Aware Online Detection of Hardware Defects for Manycore Systems with DVFS Support Mohammad-Hashem Haghbayan1, Amir-Mohammad Rahmani2, Mohammad Fattah1, Pasi Liljeberg1, Juha Plosila1 and Hannu Tenhunen1 1University of Turku, FI; 2Turku Center for Computer Science (TUCS), Finland, FI |
| 10:20 | W06.4 | Poster session and coffee break |
| 10:20 | W06.4.1 | A new adaptive system for software-based test generation of processors Jan Hudec1 and Elena Gramatova2 1Slovak UT, SK; 2University of Technology in Bratislava, SK |
| 10:20 | W06.4.2 | Radiation Impact on Mechanical Application Driven by FPGA-based Controller Jakub Podivínský1, Marcela Simkova2 and Zdenek Kotasek2 1Brno UT, CZ; 2FIT VUT in Brno, CZ |
| 10:20 | W06.4.3 | A Fault Resilient Routing Algorithm for Heterogeneous 3D NoCs Masoumeh Ebrahimi1, Ronak Salamat2, Nader Bagherzadeh3 and Masoud Daneshtalab4 1university of Turku, FI; 2Univ. California, US; 3University of California Irvine, US; 4UTU, FI |
| 10:20 | W06.4.4 | Mixed Criticality Metric for Safety-Critical Cyber-Physical Systems on Multi-Core Architectures Viacheslav Izosimov1 and Erik Levholt2 1The Royal Institute of Technology (KTH), SE; 2Svenska Grindmatriser AB, SE |
| 10:20 | W06.4.5 | Secured Connectivity of Distributed Agents in Presence of Many NoC Fault. Mohammad Fattah, Pasi Liljeberg and Juha Plosila, University of Turku, FI |
| 10:20 | W06.4.6 | On Aging of Latches' Robustness Martin Omana1, Luz Antuanet Adanaque Infante1, Cecilia Metra2 and Daniele Rossi3 1Univ. Bologna, IT; 2Università di Bologna, IT; 3Univ. Southampton, GB |
| 10:20 | W06.4.7 | Influence of Reconfiguration Techniques for Dynamically Scheduled Superscalar Processors on Power Consumption Tobias Koal1, Robert Karas1, Heinrich Theodor Vierhaus1 and Mario Schölzel2 1BTU Cottbus, DE; 2IHP and Univ. Potsdam, DE |
| 10:20 | W06.4.8 | Extended Checkers for Control Part of Routers in Network-on-Chips Ranganathan Hariharan1, Behrad Niazmand1, Thomas Hollstein2, Jaan Raik2 and Gert Jervan1 1Tallinn UT, EE; 2Tallinn University of Technology, EE |
| 10:20 | W06.4.9 | Simulation framework for optimizing SRAM power consumption under reliability constraint Florian Cacho1, Erwan Piriou2, Olivier Heron3 and Vincent Huard1 1STMicroelectronics, FR; 2CEA LIST, FR; 3CEA, FR |
| 11:20 | W06.5 | Paper session II: Verification and Test Techniques for Reliable Design Chair: |
| 11:20 | W06.5.1 | Evaluation of Failures Masking Across the Software Stack Thiago Santini1, Paolo Rech1, Anderson Luiz Sartor2, Ulisses Brisolara Corrêa3, Luigi Carro4 and Flavio Wagner4 1Federal University of Rio Grande do Sul, BR; 2Federal University of Rio Grande do Sul (UFRGS), BR; 3Instituto Federal de Educação, Ciência e Tecnologia Sul-rio-grandense, BR; 4UFRGS, BR |
| 11:40 | W06.5.2 | A novel Formal Verification Framework for future MPSoC Architectures Christian Schöler1, René Krenz-Baath1 and Roman Obermaisser2 1Hochschule Hamm-Lippstadt, DE; 2University of Siegen, DE |
| 12:00 | W06.6 | Lunch |
| 13:00 | W06.7 | Invited talk Chair: |
| 13:00 | W06.7.1 | Technology Scaling and Reliability Challenges in the Multicore Era Vincent Huard, STMicroelectronics, FR |
| 13:40 | W06.8 | Paper session III: Dependable Systems and Components Chair: |
| 13:40 | W06.8.1 | Efficient online testing of an array of reconfigurable RISC Processors S. Pagliarini1, Salvatore Pontarelli2, JImson Mathew3, Dhiraj K. Pradhan3, Ioannis Sourdis4, D.A. Khan5, A. Malek5, S. Tzilis5, Georgios Smaragdos6 and Christos Strydis6 1Univ. of Bristol, GB; 2University of Rome "Tor Vergata", IT; 3University of Bristol, GB; 4Chalmers Univeristy of Technology, SE; 5Chalmers UT, SE; 6Erasmus Medical Center, NL |
| 14:00 | W06.8.2 | Measuring and Identifying Aging-Critical Paths in FPGAs Petr Pfeifer1, Jaan Raik2, Maksim Jenihhin2, Raimund Ubar2 and Zdenek Pliva1 1Technical University Liberec, CZ; 2Tallinn University of Technology, EE |
| 14:20 | W06.8.3 | Dynamic Voltage Scaling with Fault-Tolerance for Lifetime Operation Jorge Semião1, Carlos Leong2, Ruben Cabral2, Marcelino Santos2, Isabel Teixeira2 and Paulo Teixeira2 1Univ. Algarve, PT; 2INESC-ID, PT |
| 14:40 | W06.9 | Coffee break |
| 15:00 | W06.10 | Paper session IV: Dependable Multicore Systems and Processors Testing and Self-repair Chair: |
| 15:00 | W06.10.1 | Software-Based Self-Repair for Heterogenous Multi-Core Systems Sebastian Müller1, Heinrich Theodor Vierhaus1 and Mario Schölzel2 1BTU Cottbus, DE; 2IHP and Univ. Potsdam, DE |
| 15:20 | W06.10.2 | Universal Pseudo-random Generation of Assembler Codes for Processors Ondrej Cekan, Marcela Simkova and Zdenek Kotasek, FIT VUT in Brno, CZ |
| 15:40 | W06.10.3 | Exploring check-pointing and rollback recovery under selective SBST in Chip Multi-Processors Michael Skitsas1, Chrysostomos Nicopoulos2 and Maria Michael2 1Univ. Cyprus, CY; 2University of Cyprus, CY |
| 16:00 | W06.11 | Discussion and Closing session Co-Chairs: |
| 16:00 | W06.11.1 | Discussion and Closing session |
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