Chair:
Ali Abbara, Synopsys, FR

Co-Chair:
Florian Letombe, Synopsys, FR

A first presentation will introduce the origins and main concepts of Certitude, a functional qualification tool commercialized by Synopsys.

The second speaker will give an overview on mutation-based techniques for verification purposes.

This presentation will introduce the origins and main concepts of Certitude, a functional qualification tool commercialized by Synopsys.

Certitude can measure and help to improve all aspects of functional verification quality at different levels of abstraction, including HDL  and  C/C++/SystemC languages.

Certitude is a mutation-based testing tool.  It automatically inserts bugs (also called faults) into the hardware or software models. Then it determines whether the verification environment can activate the faulty code, propagate the effects to an observable point, and detect the presence of the fault.

In this tutorial presentation we give an overview on mutation-based techniques for verification purposes.

A mutation is a modification of a component of the verification environment.

Whereas the main aim of verification is to detect unwanted mutations in the system (colloquial: bugs), intended and reproducible mutations can help to assess, reveal weaknesses, and, by this, improve the verification environment.

Mutations may be applied to the system itself (e.g., software), to system properties, to test cases, or to other verification components.

Besides explaining the basic principles, we will address the powerfulness and possible restrictions of the proposed mutation-based techniques for verification.

Chair:
Ali Abbara, Synopsys, FR

Co-Chair:
Florian Letombe, Synopsys, FR

 In this session, we will discuss Certitude usage to ensure the highest level of confidence on Multimedia IPs in STMicroelectronics on C/C++ models which are inputs of the HLS flow.

Another presentation from Bosch will consider an example of an automotive Microcontroller IP modeled on TLM in SystemC.

Verifying multimedia IPs is very challenging due to its infinite possibility of combination.

The proposed presentation will discuss about Certitude usage in STMicroelectronics to ensure the highest level of confidence on these IPs.

It will show how Certitude is applied on C/C++ models which are inputs of the HLS flow to ensure a robust verification environment.

It will also describe the developed strategies to automate this flow and find early weaknesses in the verification environment.

This presentation shows the usage of Certitude on an Automotive Microcontroller IP which is available in a VHDL implementation for a SoC integration and a SystemC implementation usable as a reference model in simulation environments.

Furthermore a comparison of Certitude results on the two independent implementations is shown.

It will give indications how qualification of two different implementations (VHDL/SystemC) can enhance the overall verification environment.