Date: Tuesday 19 March 2013
Time: 14:30 - 16:00
Location / Room: Les Bans

Chair:
Giuseppe Lipari, ENS – Cachan, FR

Co-Chair:
Benny Åkesson, TU Eindhoven, NL

The session focuses on low-level timing analysis of real-time systems. The first paper presents a novel way of analysing the behaviour of FIFO caches, which is known to be a demanding challenge. The second paper introduces the timing analysis of multi-core processors in an automotive setting, when this is subject to mode changes. The last paper explores the analysis of contention on shared SDRAM memory under a credit-controlled static priority arbitration scheme.

Time	Label	Presentation Title Authors
14:30	3.7.1	(Best Paper Award Candidate) FIFO CACHE ANALYSIS FOR WCET ESTIMATION: A QUANTITATIVE APPROACH Authors: Nan Guan1, Xinping Yang1, Mingsong Lv2 and Wang Yi1 1Uppsala University, SE; 2Northeastern University, CN Abstract
15:00	3.7.2	TIMING ANALYSIS OF MULTI-MODE APPLICATIONS ON AUTOSAR CONFORM MULTI-CORE SYSTEMS Authors: Mircea Negrean, Sebastian Klawitter and Rolf Ernst, TU Braunschweig, DE Abstract
15:30	3.7.3	BOUNDING SDRAM INTERFERENCE: DETAILED ANALYSIS VS. LATENCY-RATE ANALYSIS Authors: Hardik Shah1, Alois Knoll2 and Benny Akesson3 1fortiss, DE; 2Technische Universität München, DE; 3Polytechnic Institute of Porto, PT Abstract
16:00		End of session Coffee Break in Exhibition Hall Monday and Friday morning and afternoon coffee breaks will be located in the Salle de Reception. On Tuesday-Thursday the breaks will be located in the Exhibition Hall. Morning and afternoon (with the exception of Thursday afternoon which is a 30 minute break) coffee breaks on Tuesday-Thursday are extended breaks and will run for 60 minutes (coffee points will be open for the first 30 minutes only) from the start time indicated in the programme.