Floorplanning; automatic place and route; module generation; design rule checking and layout characterization; electrical verification; problems in deep sub-micron and high-speed design; interconnect-driven and performance-driven layout; process technology developments; design for manufacturability.
Chair: r [dot] h [dot] j [dot] m [dot] ottentue [dot] nl, Contact
Co-Chair: Azadeh Davoodi, University of Wisconsin - Madison, US, Contact
Members: