Majority-based Design Flow for AQFP Superconducting Family
Giulia Meuli1, Vinicius Possani1, Rajinder Singh1, Siang-Yun Lee2, Alessandro Tempia Calvino2, Dewmini Sudara Marakkalage2, Patrick Vuillod1, Luca Amaru1, Scott Chase1, Jamil Kawa1 and Giovanni De Micheli2
1Digital Design Group, Synopsys Inc., Mountain View, CA, USA
2Integrated Systems Laboratory, EPFL, Lausanne, Switzerland
ABSTRACT
Adiabatic superconducting devices are promising candidates to develop high-speed/low-power electronics. Advances in physical technology must be matched with a systematic development of comprehensive design and simulation tools to bring superconducting electronics to a commercially viable state. Being the technology fundamentally different from CMOS, new challenges are posed to design automation tools: library cells are controlled by multi-phase clocks, they implement the majority logic function, and they have limited fanout. We present a product-level RTL-to- GDSII flow for the design of Adiabatic Quantum-Flux-Parametron (AQFP) electronic circuits, with a focus on the special techniques used to comply with these challenges. In addition, we demonstrate new optimization opportunities for graph matching, resynthesis, and buffer/splitter insertion, improving the state-of-the-art.
Keywords: Superconducting Circuits, AQFP, EDA Flow, Logic Optimization.
