G-GPU: A Fully-Automated Generator of GPU-like ASIC Accelerators
Tiago D. Perez1,a, Márcio M. Gonçalves2,e, Leonardo Gobatto2,f, Marcelo Brandalero3, José Rodrigo Azambuja2,g and Samuel Pagliarini1,c
1Department of Computer Systems, Tallinn University of Technology (TalTech), Estonia
atiago.perez@taltech.ee
bsamuel@taltech.ee
cpagliarini@taltech.ee
2Institute of Informatics, Federal University of Rio Grande do Sul (UFRGS), Brazil
emarcio.goncalves@inf.ufrgs.br
fjleonardo.gobato
gjose.azambuja
3Brandenburg University of Technology (B-TU), Germany
marcelo.brandalero@b-tu.de
ABSTRACT
Modern Systems on Chip (SoC), almost as a rule, require accelerators for achieving energy efficiency and high performance for specific tasks that are not necessarily well suited for execution in standard processing units. Considering the broad range of applications and necessity for specialization, the design of SoCs has thus become expressively more challenging. In this paper, we put forward the concept of G-GPU, a general-purpose GPU-like accelerator that is not application-specific but still gives benefits in energy efficiency and throughput. Furthermore, we have identified an existing gap for these accelerators in ASIC, for which no known automated generation platform/tool exists. Our solution, called GPUPlanner, is an open-source generator of accelerators, from RTL to GDSII, that addresses this gap. Our analysis results show that our automatically generated G-GPU designs are remarkably efficient when compared against the popular CPU architecture RISC-V, presenting speed-ups of up to 223 times in raw performance and up to 11 times when the metric is performance derated by area. These results are achieved by executing a design space exploration of the GPU-like accelerators, where the memory hierarchy is broken in a smart fashion and the logic is pipelined on demand. Finally, tapeout-ready layouts of the G-GPU in 65nm CMOS are presented.
Keywords: Asic Generator, Domain-Specific Accelerators, General-Purpose Gpu Architectures, Integrated Circuits.
